TCS3472

COLOR LIGHT-TO-DIGITAL CONVERTER

with IR FILTER

TAOS135 − AUGUST 2012

15

The LUMENOLOGY

r Company

r

r

Copyright

E 2012, TAOS Inc.

www.taosinc.com

Enable Register (0x00)

The Enable register is used primarily to power the TCS3472 device on and off, and enable functions and

interrupts as shown in Table 5.

Table 5. Enable Register

6

75

4

PON

2

31

0

ENABLE

Reserved

AIEN

Address

0x00

AEN

WEN

Reserved

FIELD

BITS

DESCRIPTION

Reserved

7:5

Reserved. Write as 0.

AIEN

4

RGBC interrupt enable. When asserted, permits RGBC interrupts to be generated.

WEN

3

Wait enable. This bit activates the wait feature. Writing a 1 activates the wait timer. Writing a 0 disables the

wait timer.

Reserved

2

Reserved. Write as 0.

AEN

1

RGBC enable. This bit actives the two-channel ADC. Writing a 1 activates the RGBC. Writing a 0 disables

the RGBC.

0

Power ON. This bit activates the internal oscillator to permit the timers and ADC channels to operate.

Writing a 1 activates the oscillator. Writing a 0 disables the oscillator.

NOTES: 1. See Power Management section for more information.

2. A minimum interval of 2.4 ms must pass after PON is asserted before an RGBC can be initiated.