TCS3472

COLOR LIGHT-TO-DIGITAL CONVERTER

with IR FILTER

TAOS135 − AUGUST 2012

10

r

r

Copyright

E 2012, TAOS Inc.

The LUMENOLOGY

r Company

www.taosinc.com

System Timing

The system state machine shown in Figure 5 provides an overview of the states and state transitions that

provide system control of the device. This section highlights the programmable features, which affect the state

machine cycle time, and provides details to determine system level timing.

When the power management feature is enabled (WEN), the state machine will transition to the Wait state. The

wait time is determined by WLONG, which extends normal operation by 12

formula to determine the wait time is given in the box associated with the Wait state in Figure 9.

When the RGBC feature is enabled (AEN), the state machine will transition through the RGBC Init and RGBC

ADC states. The RGBC Init state takes 2.4 ms, while the RGBC ADC time is dependent on the integration time

(ATIME). The formula to determine RGBC ADC time is given in the associated box in Figure 9. If an interrupt

is generated as a result of the RGBC cycle, it will be asserted at the end of the RGBC ADC.

Sleep

Idle

Wait

RGBC

ADC

RGBC

Init

RGBC

WTIME: 1 ~ 256 steps

WLONG = 0

WLONG = 1

Time:

2.4 ms/step

28.8 ms/step

Range:

2.4 ms ~ 614 ms

28.8 ms ~ 7.37s

Time: 2.4 ms

ATIME: 1 ~ 256 steps

Time: 2.4 ms/step

Range: 2.4 ms ~ 614 ms

!PON

Notes: 1. There is a 2.4 ms warm-up delay if PON is enabled. If PON is not enabled, the device will return to the Sleep state as shown.

2. PON, WEN, and AEN are fields in the Enable register (0x00).

!WEN

& AEN

(Note 1)

WEN

& AEN

Figure 9. Detailed State Diagram