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TMS27C240-10JL Datasheet(PDF) 1 Page - Texas Instruments |
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TMS27C240-10JL Datasheet(HTML) 1 Page - Texas Instruments |
1 / 15 page ![]() TMS27C240 262144 BY 16BIT UV ERASABLE TMS27PC240 262144 BY 16BIT PROGRAMMABLE READONLY MEMORIES SMLS240D− NOVEMBER 1990 − REVISED SEPTEMBER 1997 1 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 D Organization . . . 262144 by 16 Bits D Single 5-V Power Supply D All Inputs/Outputs Fully TTL Compatible D Static Operations (No Clocks, No Refresh) D Max Access/Min Cycle Time VCC ± 10% ’27C / PC240-10 100 ns ’27C / PC240-12 120 ns ’27C / PC240-15 150 ns D 16-Bit Output For Use in Microprocessor-Based Systems D Very High Speed SNAP! Pulse Programming D Power-Saving CMOS Technology D 3-State Output Buffers D 400-mV Minimum DC Noise Immunity With Standard TTL Loads D Latchup Immunity of 250 mA on All Input and Output Lines D No Pullup Resistors Required D Low Power Dissipation (VCC = 5.5 V) − Active . . . 275 mW Worst Case − Standby . . . 0.55 mW Worst Case (CMOS-Input Levels) D Temperature Range Options description The TMS27C240 series are 262 144 by 16-bit (4 194 304-bit), ultraviolet-light erasable, electrically programmable read-only memories (EPROMs). The TMS27PC240 series are 262 144 by 16-bit (4 194 304-bit), one-time programmable (OTP) electrically programmable read-only memories (PROMs). These devices are fabricated using power-saving CMOS technology for high speed and simple interface with MOS and bipolar circuits. All inputs (including program data inputs) can be driven by Series 74 TTL circuits without the use of external pull-up resistors. Each output can drive one Series 74 TTL circuit without external resistors. The TMS27C240 EPROM is offered in a dual-in-line ceramic package (J suffix) designed for insertion in mounting hole rows on 15,2-mm (600-mil) centers. The TMS27C240 is offered with two choices of temperature ranges of 0 °C to 70°C (JL suffix) and − 40°C to 85°C (JE suffix). See Table 1. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. A0 − A17 Address Inputs DQ0 − DQ15 Inputs (programming) / Outputs E Chip Enable G Output Enable GND Ground NC No Connection VCC 5-V Supply VPP 13-V Power Supply ‡ PIN NOMENCLATURE † Pins 11 and 30 (J package) and pins 12 and 34 (FN package) must be connected externally to ground. ‡ Only in program mode 39 38 37 36 35 34 33 32 31 30 29 1 18 19 7 8 9 10 11 12 13 14 15 16 17 20 21 22 23 5 43 2 6 42 41 40 24 25 26 27 28 44 43 A13 A12 A11 A10 A9 GND† NC A8 A7 A6 A5 DQ12 DQ11 DQ10 DQ9 DQ8 GND† NC DQ7 DQ6 DQ5 DQ4 TMS27PC240 FN PACKAGE ( TOP VIEW ) Copyright 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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