A42U0616 datasheet(7/25 Pages) AMICC

Part #	A42U0616

Description	1M X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE

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Manufacturer	AMICC [AMIC Technology]

Direct Link	http://www.amictechnology.com

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A42U0616 Series

PRELIMINARY

(June, 2001, Version 0.0)

6

AMIC Technology, Inc.

AC Characteristics (VCC = 2.5V

±10%, VSS = 0V, Ta = 0°C to +70°C)

Test Conditions:

Input timing reference level: VIH/VIL=1.8V/0.8V

Output reference level: VOH/VOL=1.6V/0.8V

Output Load: 1TTL gate + CL (100pF)

Assumed tT=2ns

-50

-60

-80

#

Std

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Notes

tT

Transition Time (Rise and Fall)

1

50

1

50

1

50

ns

4, 5

tREF

Refresh Period

-

16

-

16

-

16

ms

3

1

tRC

Random Read or Write Cycle Time

84

-

104

-

134

-

ns

2

tRP

RAS Precharge Time

30

-

40

-

50

-

ns

3

tRAS

RAS Pulse Width

50

10K

60

10K

80

10K

ns

4

tCAS

CAS Pulse Width

7

10K

10

10K

15

10K

ns

5

tRCD

RAS to CAS Delay Time

11

37

14

45

20

60

ns

6

tRAD

RAS to Column Address Delay Time

9

25

12

30

15

40

ns

7

tRSH

CAS to RAS Hold Time

7

-

10

-

10

-

ns

8

tCSH

CAS Hold Time

37

-

40

-

50

-

ns

9

tCRP

CAS to RAS Precharge Time

5

-

5

-

5

-

ns

10

tASR

Row Address Setup Time

0

-

0

-

0

-

ns

11

tRAH

Row Address Hold Time

7

-

10

-

10

-

ns

12

tCLZ

CAS to Output in Low Z

0

-

0

-

0

-

ns

8

13

tRAC

Access Time from RAS

-

50

-

60

-

80

ns

6,7

14

tCAC

Access Time from CAS

-

13

-

15

-

20

ns

6, 12

15

tAA

Access Time from Column Address

-

25

-

30

-

40

ns

7, 12

16

tAR

Column Address Hold Time from RAS

44

-

55

-

70

-

ns

17

tRCS

Read Command Setup Time

0

-

0

-

0

-

ns

18

tRCH

Read Command Hold Time

0

-

0

-

0

-

ns

9

19

tRRH

Read Command Hold Time Reference

to RAS

0

-

0

-

0

-

ns

9

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