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PXAG49KBBD Datasheet(PDF) 38 Page - NXP Semiconductors |
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PXAG49KBBD Datasheet(HTML) 38 Page - NXP Semiconductors |
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38 / 42 page  Philips Semiconductors Preliminary data XA-G49 XA 16-bit microcontroller family 64K Flash/2K RAM, watchdog, 2 UARTs 2001 Jun 27 38 VDD–0.5 0.45V 0.7VDD 0.2VDD–0.1 tCHCL tC tCLCH tCLCX tCHCX SU00842 Figure 26. External Clock Drive VDD–0.5 0.45V 0.2VDD+0.9 0.2VDD–0.1 NOTE: AC inputs during testing are driven at VDD –0.5 for a logic ‘1’ and 0.45V for a logic ‘0’. Timing measurements are made at the 50% point of transitions. SU00703A Figure 27. AC Testing Input/Output VLOAD VLOAD+0.1V VLOAD–0.1V VOH–0.1V VOL+0.1V NOTE: TIMING REFERENCE POINTS For timing purposes, a port is no longer floating when a 100mV change from load voltage occurs, and begins to float when a 100mV change from the loaded VOH/VOL level occurs. IOH/IOL ≥ ±20mA. SU00011 Figure 28. Float Waveform VDD EA RST XTAL1 XTAL2 VSS VDD (NC) CLOCK SIGNAL SU00591B Figure 29. IDD Test Condition, Active Mode All other pins are disconnected VDD EA RST XTAL1 XTAL2 VSS VDD (NC) CLOCK SIGNAL SU00590B VDD Figure 30. IDD Test Condition, Idle Mode All other pins are disconnected |
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