Philips Semiconductors

Preliminary data

XA-G49

XA 16-bit microcontroller family

64K Flash/2K RAM, watchdog, 2 UARTs

2001 Jun 27

35

5. This parameter is provided for peripherals that have the data clocked in on the falling edge of the WR strobe. This is not usually the case,

and in most applications this parameter is not used.

6. Please note that the XA-G49 requires that extended data bus hold time (WM0 = 1) to be used with external bus write cycles.

7. Applies only to an external clock source, not when a crystal or ceramic resonator is connected to the XTAL1 and XTAL2 pins.

ALE

PSEN

MULTIPLEXED

ADDRESS AND DATA

UNMULTIPLEXED

ADDRESS

A0 or A1–A3, A12–19

INSTR IN

*

SU01073

A4–A11 or A4–A19

*

INSTR IN is either D0–D7 or D0–D15, depending on the bus width (8 or 16 bits).

Figure 20. External Program Memory Read Cycle (ALE Cycle)

ALE

PSEN

MULTIPLEXED

ADDRESS AND DATA

UNMULTIPLEXED

ADDRESS

A0 or A1–A3, A12–19

INSTR IN

*

SU00707

A4–A11 or A4–A19

*

INSTR IN is either D0–D7 or D0–D15, depending on the bus width (8 or 16 bits).

A0 or A1–A3, A12–19

Figure 21. External Program Memory Read Cycle (Non-ALE Cycle)