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PXAG49KBBD Datasheet(PDF) 2 Page - NXP Semiconductors |
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PXAG49KBBD Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 42 page  Philips Semiconductors Preliminary data XA-G49 XA 16-bit microcontroller family 64K Flash/2K RAM, watchdog, 2 UARTs 2 2001 Jun 27 GENERAL DESCRIPTION The XA-G49 is a member of Philips’ 80C51 XA (eXtended Architecture) family of high performance 16-bit single-chip microcontrollers. The XA-G49 contains 64 kbytes of Flash program memory, and provides three general purpose timers/counters, a watchdog timer, dual UARTs, and four general purpose I/O ports with programmable output configurations. A default serial loader program in the Boot ROM allows In-System Programming (ISP) of the Flash memory without the need for a loader in the Flash code. User programs may erase and reprogram the Flash memory at will through the use of standard routines contained in the Boot ROM (In-Application Programming). FEATURES • 64 kbytes of on-chip Flash program memory with In-System Programming capability • Five Flash blocks = two 8 kbyte blocks and three 16 kbyte blocks • Nearly identical to XA-G3, except for double the program and RAM memories • Single supply voltage In-System Programming (ISP) of the Flash memory (VPP = VDD, or VPP = 12 V if desired) • Boot ROM contains low level Flash programming routines for In-Application Programming and a default serial loader using the UART • 2048 bytes of on-chip data RAM • Supports off-chip program and data addressing up to 1 megabyte (20 address lines) • Three standard counter/timers with enhanced features (same as XA-G3 T0, T1, and T2). All timers have a toggle output capability • Watchdog timer • Two enhanced UARTs with independent baud rates • Seven software interrupts • Four 8-bit I/O ports, with 4 programmable output configurations for each pin • 30 MHz operating frequency at 5 V • Power saving operating modes: Idle and Power-Down. Wake-Up from power-down via an external interrupt is supported. • 44-pin PLCC and 44-pin LQFP packages BLOCK DIAGRAM Timer 2 UART 1 UART 0 XA CPU Core Watchdog Timer Port 0 Port 1 Port 2 2048 Bytes Static RAM 64K Bytes FLASH SFR bus Port 3 Program Memory Bus Data Bus SU01002 Timer 0, 1 |
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