Philips Semiconductors

Preliminary data

XA-G49

XA 16-bit microcontroller family

64K Flash/2K RAM, watchdog, 2 UARTs

2001 Jun 27

18

API CALL

PARAMETER

ERASE SPECIAL CELL

Input Parameters:

R0H = 95h

R6

= special cell address

0000h: erase BPSW[7:0]

0001h: erase BPSW[15:8]

0002h: erase BPC[7:0]

0003h: erase BPC[15:8]

0004h: erase status byte

Return Parameters:

R4L = 00 if pass, non–zero if fail

READ SPECIAL CELL

Input Parameters:

R0H = 96h

R6

= special cell address

0000h: read BPSW[7:0]

0001h: read BPSW[15:8]

0002h: read BPC[7:0]

0003h: read BPC[15:8]

0004h: read status byte

0006h: read manufacturer ID

0007h: read device ID #1

0008h: read device ID #2

000Ah: read security bit #1

000Ch: read security bit #2

000Eh: read security bit #3

Return Parameters:

R4L = value of byte read

Security

The security feature protects against software piracy and prevents the contents of the Flash from being read. The Security Lock bits are located

in Flash. The XA-G49 has 3 programmable security lock bits that will provide different levels of protection for the on-chip code and data (see

Table 3).

Table 3.

PROTECTION DESCRIPTION

Level

SB1

SB2

SB3

PROTECTION DESCRIPTION

1

0

0

0

No program security features enabled.

2

1

0

0

Same as level 1, plus block erase is disabled. Erase or programming of the status byte or

boot vector is disabled.

3

1

1

0

Same as level 2, plus program verification is disabled

4

1

1

1

Same as level 3, plus external execution is disabled.

NOTE:

1. Any other combination of the Lock bits is not defined.

2. Security bits are independent of each other. Full-chip erase may be performed regardless of the states of the security bits.

3. Setting LB doesn’t prevent programming of unprogrammed bits.