3

DAC8532

SBAS246A

www.ti.com

REFERENCE INPUT

Reference Current

67

90

µA

40

54

µA

Reference Input Range

0

V

Reference Input Impedance

75

k

Ω

Input Current

±1

µA

V

V

0.8

V

V

V

0.6

V

V

V

2.4

V

V

V

2.1

V

Pin Capacitance

3pF

POWER REQUIREMENTS

V

DD

2.7

5.5

V

I

DAC Active and Excluding Load Current

500

800

µA

450

750

µA

0.2

1

µA

0.05

1

µA

POWER EFFICIENCY

89

%

TEMPERATURE RANGE

Specified Performance

–40

+105

°C

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

DAC8532

NOTES: (1) Linearity calculated using a reduced code range of 485 to 64714; output unloaded. (2) Ensured by design and characterization, not production tested.

PIN

NAME

DESCRIPTION

Power supply input, +2.7V to +5.5V.

Reference voltage input.

Analog output voltage from DAC B.

Analog output voltage from DAC A.

5

SYNC

Level triggered SYNC input (active LOW). This is the

frame synchronization signal for the input data.

When SYNC goes LOW, it enables the input shift

register and data is transferred on the falling edge of

SCLK. The action specified by the 8-bit control byte

and 16-bit data word is executed following the 24th

falling SCLK clock edge (unless SYNC is taken

HIGH before this edge in which case the rising edge

of SYNC acts as an interrupt and the write sequence

is ignored by the DAC8532).

6

SCLK

Serial Clock Input. Data can be transferred at rates

up to 30 MHz at 5V.

Serial Data Input. Data is clocked into the 24-bit

input shift register on each falling edge of the serial

clock input.

8

GND

Ground reference point for all circuitry on the part.

PIN DESCRIPTIONS

PIN CONFIGURATION

Top View

MSOP-8

V

DD

V

REF

V

V

GND

D

IN

SCLK

SYNC

1

2

3

4

8

7

6

5

DAC8532