 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
DAC8534IPWRG4 Datasheet(PDF) 11 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
DAC8534IPWRG4 Datasheet(HTML) 11 Page - Texas Instruments |
|
|
11 / 24 page  11 DAC8534 SBAS254D www.ti.com The write sequence begins by bringing the SYNC line LOW. Data from the DIN line is clocked into the 24-bit shift register on each falling edge of SCLK. The serial clock frequency can be as high as 30MHz, making the DAC8534 compatible with high- speed DSPs. On the 24th falling edge of the serial clock, the last data bit is clocked into the shift register and the shift register gets locked. Further clocking does not change the shift register data. Once 24 bits are locked into the shift register, the 8MSBs are used as control bits and the 16LSBs are used as data. After receiving the 24th falling clock edge, DAC8534 decodes the 8 control bits and 16 data bits to perform the required function, without waiting for a SYNC rising edge. A new SPI sequence starts at the next falling edge of SYNC. A rising edge of SYNC before the 24-bit sequence is complete resets the SPI interface; no data transfer occurs. At this point, the SYNC line may be kept LOW or brought HIGH. In either case, the minimum delay time from the 24th falling SCLK edge to the next falling SYNC edge must be met in order to properly begin the next cycle. To assure the lowest power consumption of the device, care should be taken that the digital input levels are as close to each rail as possible. (Please refer to the “Typical Characteristics” section for the “Supply Current vs Logic Input Voltage” transfer characteristic curve.) IOVDD AND VOLTAGE TRANSLATORS The IOVDD pin powers the digital input structures of the DAC8534. For single-supply operation, it could be tied to AVDD. For dual-supply operation, the IOVDD pin provides interface flexibility with various CMOS logic families and it should be connected to the logic supply of the system. Analog circuits and internal logic of the DAC8534 use AVDD as the supply voltage. The external logic high inputs get translated to AVDD by level shifters. These level shifters use the IOVDD voltage as a THEORY OF OPERATION DAC SECTION The architecture of each channel of the DAC8534 consists of a resistor-string DAC followed by an output buffer amplifier. Figure 1 shows a simplified block diagram of the DAC architecture. The input coding for each device is unipolar straight binary, so the ideal output voltage is given by: V X V L VH VL D OUT REF REF REF IN =+ − •• 2 65536 () where D = decimal equivalent of the binary code that is loaded to the DAC register; it can range from 0 to 65535. VOUTX refers to channel A or through D. RESISTOR STRING The resistor string section is shown in Figure 2. It is simply a divide-by-2 resistor followed by a string of resistors. The code loaded into the DAC register determines at which node on the string the voltage is tapped off. This voltage is then applied to the output amplifier by closing one of the switches connecting the string to the amplifier. OUTPUT AMPLIFIER Each output buffer amplifier is capable of generating rail-to- rail voltages on its output which approaches an output range of 0V to AVDD (gain and offset errors must be taken into account). Each buffer is capable of driving a load of 2k Ω in parallel with 1000pF to GND. The source and sink capabili- ties of the output amplifier can be seen in the typical charac- teristics. SERIAL INTERFACE The DAC8534 uses a 3-wire serial interface (SYNC, SCLK, and DIN), which is compatible with SPI™, QSPI™, and Microwire™ interface standards, as well as most DSPs. See the Serial Write Operation timing diagram for an example of a typical write sequence. FIGURE 1. DAC8534 Architecture. To Output Amplifier (2x Gain) R R R R V REF 2 V REFH R DIVIDER V REFL FIGURE 2. Resistor String. DAC Register REF (+) Resistor String REF(–) V REFH V REFL V OUT 50k Ω 50k Ω 70k Ω |
Similar Part No. - DAC8534IPWRG4 |
|
Similar Description - DAC8534IPWRG4 |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
