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RV4145 Datasheet(PDF) 9 Page - Fairchild Semiconductor |
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RV4145 Datasheet(HTML) 9 Page - Fairchild Semiconductor |
9 / 11 page RV4145A PRODUCT SPECIFICATION REV. 1.0.3 3/6/02 9 Mechanical Dimensions (continued) 8-Lead SOIC Package 85 14 D A A1 – C – ccc C LEAD COPLANARITY SEATING PLANE e B L h x 45 ° C α EH A .053 .069 1.35 1.75 Symbol Inches Min. Max. Min. Max. Millimeters Notes A1 .004 .010 0.10 0.25 .020 0.51 B .013 0.33 C .008 .010 0.20 0.25 E .150 .158 3.81 4.01 e .228 .244 5.79 6.20 .010 .020 0.25 0.50 H .050 BSC 1.27 BSC h L .016 .050 0.40 1.27 0 ° 8 ° 0 ° 8 ° 3 6 5 2 2 N8 8 α ccc .004 0.10 —— D .189 .197 4.80 5.00 Notes: 1. 2. 3. 4. 5. 6. Dimensioning and tolerancing per ANSI Y14.5M-1982. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). "L" is the length of terminal for soldering to a substrate. Terminal numbers are shown for reference only. "C" dimension does not include solder finish thickness. Symbol "N" is the maximum number of terminals. |
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