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ADP5589ACBZ-02-R7 Datasheet(PDF) 15 Page - Analog Devices |
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ADP5589ACBZ-02-R7 Datasheet(HTML) 15 Page - Analog Devices |
15 / 52 page Data Sheet ADP5589 Rev. B | Page 15 of 52 GPI Input Each of the 19 I/O lines can be configured as a general-purpose logic input line. Figure 17 shows a detailed representation of the GPI scan and detect block and all its associated control and status signals. PIN_CONFIG_A[7:0] PIN_CONFIG_B[7:0] PIN_CONFIG_C[2:0] UNLOCK1[7:0] UNLOCK2[7:0] EXT_LOCK_EVENT[7:0] UNLOCK_TIMER[2:0] INT_MASK_TIMER[4:0] LOCK_EN GPI_INT GPI SCAN CONTROL GPIO 1 GPIO 2 GPIO 3 GPIO 4 GPIO 5 GPIO 6 GPIO 7 GPIO 8 GPIO 9 GPIO 10 GPIO 11 GPIO 12 GPIO 13 GPIO 14 GPIO 15 GPIO 16 GPIO 17 GPIO 18 GPIO 19 (R0) (R1) (R2) (R3) (R4) (R5) (R6) (R7) (C0) (C1) (C2) (C3) (C4) (C5) (C6) (C7) (C8) (C9) (C10) GPI EVENT I2C BUSY? KEY EVENT OVRFLOW_INT LOGIC EVENT GPI_INT_LEVEL_A[7:0] GPI_INT_LEVEL_B[7:0] GPI_INT_LEVEL_C[2:0] GPI_INTERRUPT_EN_A[7:0] GPIO_DIRECTION_A[7:0] GPI_STATUS_A[7:0] GPI_STATUS_B[7:0] GPI_STATUS_C[2:0] GPI_INT_STAT_A[7:0] LCK_TRK_GPI LOCK_STAT LOCK_INT GPI_EVENT_EN_A[7:0] GPIO_DIRECTION_B[7:0] GPIO_DIRECTION_C[2:0] GPI_INTERRUPT_EN_B[7:0] GPI_INTERRUPT_EN_C[2:0] GPI_EVENT_EN_B[7:0] GPI_EVENT_EN_C[2:0] EVENT_INT GPI_INT_STAT_B[7:0] GPI_INT_STAT_C[2:0] RESET_TRIGGER_TIME[2:0] RESET1_EVENT_A[7:0] RESET1_EVENT_B[7:0] RESET1_EVENT_C[7:0] RESET2_EVENT_A[7:0] RESET2_EVENT_B[7:0] FIFO UPDATE FIFO EC[4:0] Figure 17. GPI Scan and Detect Block The current input state of each GPI can be read back using the GPI_STATUS_x registers. Each GPI can be programmed to generate an interrupt via the GPI_INTERRUPT_EN_x registers. The interrupt status is stored in the GPI_INT_STAT_x registers. GPI interrupts can be programmed to trigger on inputs being high or on inputs being low via the GPI_INT_LEVEL_x registers. If any of the GPI interrupts is triggered, the master GPI_INT interrupt is also triggered. Figure 18 demonstrates a single GPI and how it affects its corresponding status and interrupt status bits. CLEARED BY READ GPI 6 GPI_STATUS_A[5] GPI_INTERRUPT_EN_A[5] GPI_INT_STAT_A[5] GPI_INT GPI_INT_LEVEL_A[5] CLEARED BY WRITE ‘1’ Figure 18. Single GPI Example GPIs can be programmed to generate FIFO events via the GPI_EVENT_EN_x registers. GPIs in this mode do not gener- ate GPI_INT interrupts and instead generate EVENT_INT interrupts. Figure 19 shows several GPI lines and their effects on the FIFO and event count, EC[4:0]. GPI 2 GPI SCAN EVENT_INT EC[4:0] 16 GPI 2 ACTIVE GPI 14 GPI 6 23 4 5 GPI 6 ACTIVE GPI 14 ACTIVE GPI 14 INACTIVE GPI 6 ACTIVE GPI 2 ACTIVE FIFO 1 1 1 0 0 0 101 101 105 105 113 113 Figure 19. Multiple GPI Lines Example The GPI scanner is idle until it detects a level transition. It scans the GPI inputs and updates accordingly. It then returns to idle immediately; it does not scan/wait, like the key scanner. As such, the GPI scanner can detect narrow pulses once they get past the 50 μs input debounce filter. GPIs (programmed for FIFO updating) can be used as keypad unlock events via the UNLOCKx registers (see the FIFO Lock/Unlock section). The LCK_TRK_GPI bit can be used to allow GPIs (programmed for FIFO updating) to be tracked when the keypad is locked. GPO OUTPUT Each of the 19 I/O lines can be configured as a general-purpose output (GPO) line. Figure 6 shows a detailed diagram of the I/O structure. See the Detailed Register Descriptions section for GPO configuration and usage. |
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