1,6mm(min)

0,5mm(typ)

0,33mm(typ)

CDCLVP1204

SCAS880C

– AUGUST 2009 – REVISED AUGUST 2011

www.ti.com

APPLICATION INFORMATION

Thermal Management

Power consumption of the CDCLVP1204 can be high enough to require attention to thermal management. For

reliability and performance reasons, the die temperature should be limited to a maximum of +125

°C. That is, as

The device package has an exposed pad that provides the primary heat removal path to the printed circuit board

(PCB). To maximize the heat dissipation from the package, a thermal landing pattern including multiple vias to a

ground plane must be incorporated into the PCB within the footprint of the package. The exposed pad must be

soldered down to ensure adequate heat conduction out of the package. Figure 12 shows a recommended land

and via pattern.

Figure 12. Recommended PCB Layout

Power-Supply Filtering

High-performance clock buffers are sensitive to noise on the power supply, which can dramatically increase the

additive jitter of the buffer. Thus, it is essential to reduce noise from the system power supply, especially when

jitter/phase noise is very critical to applications.

Filter capacitors are used to eliminate the low-frequency noise from the power supply, where the bypass

capacitors provide the very low impedance path for high-frequency noise and guard the power-supply system

against the induced fluctuations. These bypass capacitors also provide instantaneous current surges as required

by the device and should have low equivalent series resistance (ESR). To properly use the bypass capacitors,

they must be placed very close to the power-supply pins and laid out with short loops to minimize inductance. It

is recommended to add as many high-frequency (for example, 0.1-

μF) bypass capacitors as there are supply

pins in the package. It is recommended, but not required, to insert a ferrite bead between the board power supply

and the chip power supply that isolates the high-frequency switching noises generated by the clock driver; these

beads prevent the switching noise from leaking into the board supply. Choose an appropriate ferrite bead with

very low dc resistance because it is imperative to provide adequate isolation between the board supply and the

chip supply, as well as to maintain a voltage at the supply pins that is greater than the minimum voltage required

for proper operation.

10

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Product Folder Link(s): CDCLVP1204