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CDCLVP1204RGTT Datasheet(PDF) 5 Page - Texas Instruments

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Part # CDCLVP1204RGTT
Description  Four LVPECL Output, High-Performance Clock Buffer
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CDCLVP1204RGTT Datasheet(HTML) 5 Page - Texas Instruments

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CDCLVP1204
OUTP2
OUTN2
OUTP3
OUTN3
ThermalPad
(1)
V
CC
V
AC_REF
INN0
INP0
CDCLVP1204
www.ti.com
SCAS880C
– AUGUST 2009 – REVISED AUGUST 2011
RGT PACKAGE
QFN-16
(TOP VIEW)
(1)
Thermal pad must be soldered to ground.
PIN DESCRIPTIONS
CDCLVP1204 Pin Descriptions
TERMINAL
TERMINAL
PULL-UP/
NAME
NO.
TYPE
PULLDOWN
DESCRIPTION
VCC
5
Power
3.3-V supply for the device
GND
1
Ground
Device ground
INP0, INN0
6, 7
Input
Differential input pair or single-ended input. Unused input pair can be left floating.
Redundant differential input pair or single-ended input. Unused input pair can be
INP1, INN1
3, 4
Input
left floating.
OUTP3,
15, 16
Output
Differential LVPECL output pair no. 3. Unused output pair can be left floating.
OUTN3
OUTP2,
13, 14
Output
Differential LVPECL output pair no. 2. Unused output pair can be left floating.
OUTN2
OUTP1,
11, 12
Output
Differential LVPECL output pair no. 1. Unused output pair can be left floating.
OUTN1
OUTP0
9, 10
Output
Differential LVPECL output pair no. 0. Unused output pair can be left floating.
OUTN0
Bias voltage output for capacitive-coupled inputs. Do not use VAC_REF at VCC <
VAC_REF
8
3.0 V. If used, it is recommended to use a 0.1-
μF capacitor to GND on this pin.
The output current is limited to 2 mA.
Pulldown
IN_SEL
2
MUX select input for input choice (see Table 2)
(see Table 1)
Table 1. Pin Characteristics
PARAMETER
MIN
TYP
MAX
UNITS
RPULLDOWN
Input pulldown resistor
150
k
Table 2. Input Selection Table
IN_SEL
ACTIVE CLOCK INPUT
0
INP0, INN0
1
INP1, INN1
Copyright
© 2009–2011, Texas Instruments Incorporated
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5
Product Folder Link(s): CDCLVP1204


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