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CDCLVP1204RGTT Datasheet(PDF) 3 Page - Texas Instruments |
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CDCLVP1204RGTT Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 22 page  CDCLVP1204 www.ti.com SCAS880C – AUGUST 2009 – REVISED AUGUST 2011 ELECTRICAL CHARACTERISTICS: LVCMOS Input (1) At VCC = 2.375 V to 3.6 V and TA = –40°C to +85°C (unless otherwise noted). CDCLVP1204 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fIN Input frequency 200 MHz External threshold voltage applied to Vth Input threshold voltage 1.1 1.8 V complementary input VIH Input high voltage Vth + 0.1 VCC V VIL Input low voltage 0 Vth – 0.1 V IIH Input high current VCC = 3.6 V, VIH = 3.6 V 40 μA IIL Input low current VCC = 3.6 V, VIL = 0 V –40 μA ΔV/ΔT Input edge rate 20% to 80% 1.5 V/ns ICAP Input capacitance 5 pF (1) Figure 3 and Figure 4 show dc test setup. ELECTRICAL CHARACTERISTICS: Differential Input (1) At VCC = 2.375 V to 3.6 V and TA = –40°C to +85°C (unless otherwise noted). CDCLVP1204 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fIN Input frequency Clock input 2000 MHz fIN ≤ 1.5 GHz 0.1 1.5 V VIN, DIFF, PP Differential input peak-peak voltage 1.5 GHz ≤ fIN ≤ 2 GHz 0.2 1.5 V VICM Input common-mode level 1.0 VCC – 0.3 V IIH Input high current VCC = 3.6 V, VIH = 3.6 V 40 μA IIL Input low current VCC = 3.6 V, VIL = 0 V –40 μA ΔV/ΔT Input edge rate 20% to 80% 1.5 V/ns ICAP Input capacitance 5 pF (1) Figure 5 and Figure 6 show dc test setup. Figure 7 shows ac test setup. ELECTRICAL CHARACTERISTICS: LVPECL Output (1) At VCC = 2.375 V to 2.625 V and TA = –40°C to +85°C (unless otherwise noted). CDCLVP1204 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH Output high voltage VCC – 1.26 VCC – 0.9 V VOL Output low voltage VCC – 1.7 VCC – 1.3 V VOUT, DIFF, PP Differential output peak-peak voltage fIN ≤ 2 GHz 0.5 1.35 V VAC_REF Input bias voltage(2) IAC_REF = 2 mA VCC – 1.6 VCC – 1.1 V VIN, DIFF, PP = 0.1V 450 ps tPD Propagation delay VIN, DIFF, PP = 0.3V 450 ps tSK,PP Part-to-part skew 100 ps tSK,O Output skew 15 ps Crossing-point-to-crossing-point distortion, tSK,P Pulse skew (with 50% duty cycle input) –50 50 ps fOUT = 100 MHz fOUT = 100 MHz, VIN,SE = VCC, Vth = 1.25 V, 0.081 ps, RMS 10 kHz to 20 MHz fOUT = 100 MHz, VIN,SE = 0.9 V, 0.091 ps, RMS Vth = 1.1 V, 10 kHz to 20 MHz Random additive jitter (with 50% duty fOUT = 2 GHz, VIN,DIFF,PP = 0.2 V, tRJIT 0.041 ps, RMS cycle input) VICM = 1 V, 10 kHz to 20 MHz fOUT = 100 MHz, VIN,DIFF,PP = 0.15 V, 0.088 ps, RMS VICM = 1 V, 10 kHz to 20 MHz (1) Figure 8 and Figure 9 show dc and ac test setup. (2) Internally generated bias voltage (VAC_REF) is for 3.3-V operation only. It is recommended to apply externally generated bias voltage for VCC < 3.0 V. Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): CDCLVP1204 |
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