S1C17554/564

S1C17564

CPU Core S1C17

Internal RAM

(16K bytes)

Flash memory

(128K bytes)

Test circuit

Reset circuit

Interrupt controller

16-bit timer (3ch.)

Fine mode

16-bit timer (2ch.)

UART (2ch.)

SPI (3ch.)

A/D converter

MISC register

Clock register

(with oscillators)

Clock timer

Stopwatch timer

Watchdog timer

16-bit PWM timer

(4ch.)

IR remote controller

I/O 2 (0x5000-)

I/O 1 (0x4000-)

TEST

#RESET

SINx, SOUTx,

SCLKx

SDIx, SDOx,

SPICLKx,

#SPISSx

SDA0, SCL0

SDA1, SCL1,

#BFR

Pxx

REMI, REMO

EXCLx, CAPx,

TOUTx

OSC1-2, OSC3-4,

FOUTA, FOUTB

AVDD

AINx, #ADTRG

DCLK, DST2,

DSIO

32 bits

16 bits

8/16 bits

8/16 bits

I/O prt/

Port MUX

Regulator

VIN, VOUT, REGEN

IR remote controller

US_SDIx, US_SDOx,

US_SCKx, US_SSIx

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Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind

arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no

representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to

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required by such laws and regulations. You are requested not to use, to resell, to export and/or to otherwise dispose of the products (and

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All brands or product names mentioned herein are trademarks and/or registered trademarks of their respective companies.

©Seiko Epson Corporation 2013 All rights reserved

SEIKO EPSON CORPORATION

EPSON semiconductor website

http://www.epson.jp/device/semicon_e/

IC Sales & Marketing Department

421-8 Hino, Hino-shi, Tokyo 191-8501, JAPAN

Phone: +81-42-587-5814

FAX: +81-42-587-5117

MICRODEVICES OPERATIONS DIVISION

Document code: 411827101

First issue April, 2010

Revised Aug, 2013.

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