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S1C17001 Datasheet(PDF) 6 Page - Epson Company |
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S1C17001 Datasheet(HTML) 6 Page - Epson Company |
6 / 6 page ![]() http://www.epson.jp/device/semicon_e S1C17001 NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export license from the Ministry of Economy, Trade and Industry or other approval from another government agency. © SEIKO EPSON CORPORATION 2008, All right reserved. SEIKO EPSON CORPORATION ■ EPSON Electronic Devices Website SEMICONDUCTOR OPERATIONS DIVISION IC Sales Dept. IC International Sales Group Document code: 411207701 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN First issue September, 2007 Phone: +81-42-587-5814 FAX: +81-42-587-5117 Printed April, 2008 in Japan L Dual-power supply system (LVDD ≠ HVDD) P00~P03 P04 (REMI) P05 (REMO) P06 (EXCL2) P07 (EXCL1) P10~P12 P13 (FOUT1) P14 (SDA) P15 (SCL) P16 (EXCL0) P17 (#SPISS) P20 (SDI) P21 (SDO) P22 (SPICLK) P23 (SIN) P24 (SOUT) P25 (SCLK) P26 (TOUT) P27 (EXCL3) P30 (FOUT3) DSIO (P33) DCLK (P31) DST2 (P32) S1C17001 [The potential of the substrate (back of the chip) is VSS.] HVDD #TEST1–#TEST5 LVDD #RESET OSC3 OSC4 OSC1 OSC2 TEST0 VSS ICD or I/O I/O HVDD 10k Cres 3.3 V CPH + - 1.8 V CPL + - Rd3 Rd1 CD3 X'tal3 or CE Rf3 CG3 CD1 X'tal1 Rf1 CG1 Recommended values for external parts Symbol X'tal1 CG1 CD1 Rf1 Rd1 X'tal3 CE CG3 CD3 Rf3 Rd3 CP Cres Name Crystal oscillator Gate capacitor Drain capacitor Feedback resistor Drain resistor Crystal oscillator Ceramic oscillator Gate capacitor Drain capacitor Feedback resistor Drain resistor Capacitor for power supply Capacitor for #RESET pin Recommended value 32.768 kHz (MC-146, EPSON TOYOCOM) 7 pF 7 pF 10 M Ω 0 Ω 8 MHz (CA-301, EPSON TOYOCOM) 0.2–8 MHz 27 pF 27 pF 1 M Ω 0 Ω 3.3 μF 0.47 μF Note: The above table is simply an example, and is not guaranteed to work. |
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