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S1C17001 Datasheet(PDF) 5 Page - Epson Company |
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S1C17001 Datasheet(HTML) 5 Page - Epson Company |
5 / 6 page S1C17001 EPSON 5 ■ BASIC EXTERNAL CONNECTION DIAGRAM Single power supply system (LVDD = HVDD) P00~P03 P04 (REMI) P05 (REMO) P06 (EXCL2) P07 (EXCL1) P10~P12 P13 (FOUT1) P14 (SDA) P15 (SCL) P16 (EXCL0) P17 (#SPISS) P20 (SDI) P21 (SDO) P22 (SPICLK) P23 (SIN) P24 (SOUT) P25 (SCLK) P26 (TOUT) P27 (EXCL3) P30 (FOUT3) DSIO (P33) DCLK (P31) DST2 (P32) Recommended values for external parts S1C17001 [The potential of the substrate (back of the chip) is VSS.] LVDD HVDD #TEST1–#TEST5 #RESET OSC3 OSC4 OSC1 OSC2 TEST0 VSS ICD or I/O I/O HVDD 10k Symbol X'tal1 CG1 CD1 Rf1 Rd1 X'tal3 CE CG3 CD3 Rf3 Rd3 CP Cres Name Crystal oscillator Gate capacitor Drain capacitor Feedback resistor Drain resistor Crystal oscillator Ceramic oscillator Gate capacitor Drain capacitor Feedback resistor Drain resistor Capacitor for power supply Capacitor for #RESET pin Recommended value 32.768 kHz (MC-146, EPSON TOYOCOM) 7 pF 7 pF 10 M Ω 0 Ω 8 MHz (CA-301, EPSON TOYOCOM) 0.2–8 MHz 27 pF 27 pF 1 M Ω 0 Ω 3.3 μF 0.47 μF Rd3 Rd1 CD3 X'tal3 or CE Rf3 CG3 CD1 X'tal1 Rf1 CG1 Cres 1.65 V | 2.7 V CP + - Note: The above table is simply an example, and is not guaranteed to work. |
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