ADV7120

REV. B

–3–

.

Parameter

80 MHz Version

50 MHz Version

30 MHz Version

Units

Conditions/Comments

80

50

30

MHz max

Clock Rate

3

6

8

ns min

Data & Control Setup Time

2

2

2

ns min

Data & Control Hold Time

12.5

20

33.3

ns min

Clock Cycle Time

4

7

9

ns min

Clock Pulse Width High Time

4

7

9

ns min

Clock Pulse Width Low Time

30

30

30

ns max

Analog Output Delay

20

20

20

ns typ

3

3

3

ns max

Analog Output Rise/Fall Time

3

12

15

15

ns typ

Analog Output Transition Time

NOTES

≤3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs

and outputs. See timing notes in Figure 1.

°C to ensure compliance.

Specifications subject to change without notice.

CLOCK

DATA

t

2

t

4

t

5

t

8

t

7

t

6

ANALOG OUTPUTS

(IOR, IOG, IOB, I

t

3

t

1

DIGITAL INPUTS

(R0-R7, G0-G7, B0-B7;

SYNC, BLANK,

REF WHITE)

NOTES

1. OUTPUT DELAY (

t

6

) MEASURED FROM THE 50% POINT OF THE RISING EDGE OF

CLOCK TO THE 50% POINT OF FULL-SCALE TRANSITION.

2. TRANSITION TIME (

t

8

) MEASURED FROM THE 50% POINT OF FULL-SCALE

TRANSITION TO WITHIN 2% OF THE FINAL OUTPUT VALUE.

3. OUTPUT RISE/FALL TIME (

t

7

) MEASURED BETWEEN THE 10% AND 90% POINTS

OF FULL TRANSITION.

Figure 1. Video Input/Output Timing