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R1QKA3618CBG Datasheet(PDF) 17 Page - Renesas Technology Corp

Part # R1QKA3618CBG
Description  36-Mbit QDRII SRAM 4-word Burst
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R1QKA3618CBG Datasheet(HTML) 17 Page - Renesas Technology Corp

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PAGE : 17
Rev. 0.09a : 2011.09.14
R1QGA36**CB* / R1QKA36**CB* Series
Absolute Maximum Ratings
Notes:
1.
All voltage is referenced to V
SS.
2.
Permanent device damage may occur if Absolute Maximum Ratings are exceeded.
Functional operation should be restricted the Operation Conditions. Exposure to higher than
recommended voltages for extended periods of time could affect device reliability.
3.
These CMOS memory circuits have been designed to meet the DC and AC specifications
shown in the tables after thermal equilibrium has been established.
4.
The following supply voltage application sequence is recommended: V
SS, VDD, VDDQ, VREF
then V
IN. Remember, according to the Absolute Maximum Ratings table, VDDQ is not to
exceed 2.5 V, whatever the instantaneous value of V
DDQ.
5.
Some method of cooling or airflow should be considered in the system. (Especially for high
frequency or ODT parts)
C
C
V
V
V
V
Unit
1, 4
0.5 to V
DDQ + 0.5
(2.5 V max.)
V
I/O
Input/output voltage
1, 4
0.5 to 2.5
V
DD
Core supply voltage
1, 4
0.5 to V
DD
V
DDQ
Output supply voltage
5
+125 (max)
Tj
Junction temperature
55 to +125
T
STG
Storage temperature
1, 4
0.5 to V
DD + 0.5
(2.5 V max.)
V
IN
Input voltage on any ball
Notes
Rating
Symbol
Parameter
Common
Recommended DC Operating Conditions
0.75
1.5
1.8
Typ
V
REF
0.1
V
DDQ + 0.3
0.95
V
DD
1.9
Max
Notes:
1. At power-up, V
DD and VDDQ are assumed to be a linear ramp from 0V to VDD(min.) or
V
DDQ(min.) within 200ms. During this time VDDQ < VDD and VIH < VDDQ.
During normal operation, V
DDQ must not exceed VDD.
2. Please pay attention to Tj not to exceed the temperature shown in the absolute maximum
ratings table due to current from V
DDQ.
3. Peak to peak AC component superimposed on V
REF may not exceed 5% of VREF.
4. These are DC test criteria. The AC V
IH / VIL levels are defined separately to measure timing
parameters.
5. Overshoot: V
IH (AC)
V
DDQ + 0.5 V for t
t
KHKH/2
Undershoot: V
IL (AC)
0.5 V for t
t
KHKH/2
During normal operation, V
IH(DC) must not exceed VDDQ and VIL(DC) must not be lower than VSS.
V
V
V
V
V
Unit
1, 2
1.4
V
DDQ
Power supply voltage -- I/O
3
0.68
V
REF
Input reference voltage -- I/O
1, 4, 5
V
REF + 0.1
V
IH (DC)
Input high voltage
1, 4, 5
0.3
V
IL (DC)
Input low voltage
1
1.7
V
DD
Power supply voltage -- core
Notes
Min
Symbol
Parameter
R10DS0161EJ0009


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