AD9288BSTZ-80 datasheet(3/24 Pages) AD

Part #	AD9288BSTZ-80

Description	8-Bit, 40/80/100 MSPS Dual A/D Converter

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Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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AD9288

Rev. C | Page 3 of 24

SPECIFICATIONS

VDD = 3.0 V; VD = 3.0 V, differential input; external reference, unless otherwise noted.

Table 1.

Test

AD9288BST-100

AD9288BST-80

AD9288BST-40

Parameter

Temp

Level

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

RESOLUTION

8

Bits

DC ACCURACY

Differential Nonlinearity

25°C

I

± 0.5

+1.25

± 0.5

+1.25

± 0.5

+1.25

LSB

Full

VI

1.50

LSB

Integral Nonlinearity

25°C

I

± 0.50

+1.25

± 0.50

+1.25

± 0.50

+1.25

LSB

Full

VI

1.50

LSB

No Missing Codes

Full

VI

Guaranteed

Gain Error1

25°C

I

–6

± 2.5

+6

–6

± 2.5

+6

–6

± 2.5

+6

% FS

Full

VI

–8

+8

–8

+8

–8

+8

% FS

Gain Tempco1

Full

VI

80

ppm/°C

Gain Matching

25°C

V

±1.5

% FS

Voltage Matching

25°C

V

±15

mV

ANALOG INPUT

Input Voltage Range (with

Respect to AIN)

Full

V

±512

mV p-p

Common-Mode Voltage

Full

V

0.3 ×

VD

0.3 × VD

0.3 ×

VD

0.3 ×

VD

0.3 × VD

0.3 ×

VD

0.3 ×

VD

0.3 × VD

0.3 ×

VD

V

–0.2

+0.2

–0.2

+0.2

–0.2

+0.2

Input Offset Voltage

25°C

I

–35

±10

+35

–35

± 10

+35

–35

± 10

+35

mV

Full

VI

–40

+40

–40

+40

–40

+40

mV

Reference Voltage

Full

VI

1.2

1.25

1.3

1.2

1.25

1.3

1.2

1.25

1.3

V

Reference Tempco

Full

VI

± 130

ppm/°C

Input Resistance

25°C

I

7

10

13

7

10

13

7

10

13

kΩ

Full

VI

5

16

5

16

5

16

Input Capacitance

25°C

V

2

pF

Analog Bandwidth, Full

Power

25°C

V

475

MHz

SWITCHING PERFORMANCE

Maximum Conversion Rate

Full

VI

100

80

40

MSPS

Minimum Conversion Rate

25°C

IV

1

MSPS

Encode Pulse Width High (tEH)

25°C

IV

4.3

1000

5.0

1000

8.0

1000

ns

Encode Pulse Width Low (tEL)

25°C

IV

4.3

1000

5.0

1000

8.0

1000

ns

Aperture Delay (tA)

25°C

V

300

ps

Aperture Uncertainty (Jitter)

25°C

V

5

ps rms

Output Valid Time (tV)2

Full

VI

2

3.0

2

3.0

2

3.0

ns

Output Propagation Delay

(tPD)2

Full

VI

4.5

6.0

4.5

6.0

4.5

6.0

ns

DIGITAL INPUTS

Logic 1 Voltage

Full

VI

2.0

V

Logic 0 Voltage

Full

VI

0.8

V

Logic 1 Current

Full

VI

± 1

µA

Logic 0 Current

Full

VI

± 1

µA

Input Capacitance

25°C

V

2.0

pF

DIGITAL OUTPUTS3

Logic 1 Voltage

Full

VI

2.45

V

Logic 0 Voltage

Full

VI

0.05

V

POWER SUPPLY

Power Dissipation4

Full

VI

180

218

171

207

156

189

mW

Standby Dissipation4, 5

Full

VI

6

11

6

11

6

11

mW

Power Supply Rejection

Ratio (PSRR)

25°C

I

8

20

8

20

8

20

mV/V

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