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FAN7930MX Datasheet(PDF) 15 Page - Fairchild Semiconductor |
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FAN7930MX Datasheet(HTML) 15 Page - Fairchild Semiconductor |
15 / 22 page ![]() © 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7930 • Rev. 1.0.1 15 1.5V 150ns 1.4V ON FAN7930 Rev.00 VZCD t IINDUCTOR MOSFET gate INEGATIVE ON IIN IMOSFET IDIODE Figure 36. Input and Output Current Near Input Voltage Peak Figure 37. Input and Output Current Near Input Voltage Peak Zero Cross To improve this, lengthened turn-on time near the zero cross region is a well-known technique, though the method may be different from company to company and may be proprietary. FAN7930 emdodies this by sourcing current through the ZCD pin. Auxiliary winding voltage becomes negative when the MOSFET turns on and is proportional to input voltage. The negative clamping circuit of ZCD outputs the current to maintain the ZCD voltage at a fixed value. The sourcing current from the ZCD is directly proportional to the input voltage. Some portion of this current is applied to the internal sawtooth generator together with a fixed-current source. Theoretically, the fixed-current source and the capacitor at sawtooth generator decide the maximum turn-on time when no current is sourcing at ZCD clamp circuit and available turn-on time gets shorter proportional to the ZCD sourcing current. Figure 38. Circuit of THD Optimizer Figure 39. Effect of THD Optimizer By THD optimizer, turn-on time over one AC line period is proportionally changed, depending on input voltage. Near zero cross, lengthened turn-on time improves THD performance. 9. Input Voltage Absent Detection: To save power loss caused by input voltage sensing resistors and to optimize THD easily, the FAN7930 omits AC input voltage detection. Therefore, no information about AC input is available from the internal controller. In many cases, the VCC of PFC controller is supplied by a independent power source like standby power. In this scheme, some mismatch may exist. For example, when the electric power is suddenly interrupted during two or three AC line periods; VCC is still alive during that time, but output voltage drops because there is no input power source. Consequently, the control loop tries to compensate for the output voltage drop and VCOMP reaches its maximum. This lasts until AC input voltage is |
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