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SI8441AB-D-IS Datasheet(PDF) 20 Page - Silicon Laboratories

Part # SI8441AB-D-IS
Description  LOW-POWER QUAD-CHANNEL DIGITAL ISOLATOR
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

SI8441AB-D-IS Datasheet(HTML) 20 Page - Silicon Laboratories

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Si8440/41/42/45
20
Rev. 1.5
2.3. Device Operation
Device behavior during start-up, normal operation, and shutdown is shown in Table 12. Table 13 provides an
overview of the output states when the Enable pins are active.
Table 12. Si84xx Logic Operation Table
VI
Input1,2
EN
Input1,2,3,4
VDDI
State1,5,6
VDDO
State1,5,6
VO Output
1,2
Comments
HH or NC
P
P
H
Enabled, normal operation.
LH or NC
P
P
L
X7
L
P
P
Hi-Z or L8
Disabled.
X7
H or NC
UP
P
L
Upon transition of VDDI from unpowered to pow-
ered, VO returns to the same state as VI in less
than 1 µs.
X7
L
UP
P
Hi-Z or L8
Disabled.
X7
X7
P
UP
Undetermined
Upon transition of VDDO from unpowered to pow-
ered, VO returns to the same state as VI within
1 µs, if EN is in either the H or NC state. Upon
transition of VDDO from unpowered to powered,
VO returns to Hi-Z within 1 µs if EN is L.
Notes:
1. VDDI and VDDO are the input and output power supplies. VI and VO are the respective input and output terminals. EN
is the enable control input located on the same output side.
2. X = not applicable; H = Logic High; L = Logic Low; Hi-Z = High Impedance.
3. It is recommended that the enable inputs be connected to an external logic high or low level when the Si84xx is
operating in noisy environments.
4. No Connect (NC) replaces EN1 on Si8440/45. No Connect replaces EN2 on the Si8445. No Connects are not internally
connected and can be left floating, tied to VDD, or tied to GND.
5. “Powered” state (P) is defined as 2.70 V < VDD < 5.5 V.
6. "Unpowered" state (UP) is defined as VDD = 0 V.
7. Note that an I/O can power the die for a given side through an internal diode if its source has adequate current.
8. When using the enable pin (EN) function, the output pin state is driven to a logic low state when the EN pin is disabled
(EN = 0) in Revision C. Revision D outputs go into a high-impedance state when the EN pin is disabled (EN = 0). See
"3. Errata and Design Migration Guidelines" on page 25 for more details.


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