Si8440/41/42/45

Rev. 1.5

15

Table 6. Regulatory Information*

CSA

The Si84xx is certified under CSA Component Acceptance Notice 5A. For more details, see File 232873.

age.

VDE

The Si84xx is certified according to IEC 60747-5-2. For more details, see File 5006301-4880-0001.

UL

The Si84xx is certified under UL1577 component recognition program. For more details, see File E257455.

For more information, see "5. Ordering Guide" on page 27.

Table 7. Insulation and Safety-Related Specifications

Parameter

Symbol

Test Condition

Value

Unit

WB

SOIC-16

NB

SOIC-16

Nominal Air Gap (Clearance)1

L(IO1)

8.0

4.9

mm

Nominal External Tracking (Creepage)1

L(IO2)

8.0

4.01

mm

Minimum Internal Gap (Internal Clearance)

0.008

0.008

mm

Tracking Resistance

(Proof Tracking Index)

PTI

IEC60112

600

600

Erosion Depth

ED

0.040

0.019

mm

Resistance (Input-Output)2



Capacitance (Input-Output)2

f = 1 MHz

2.0

2.0

pF

Input Capacitance3

4.0

4.0

pF

Notes:

1. The values in this table correspond to the nominal creepage and clearance values as detailed in “6. Package Outline:

16-Pin Wide Body SOIC” and “8. Package Outline: 16-Pin Narrow Body SOIC”. VDE certifies the clearance and

creepage limits as 4.7 mm minimum for the NB SOIC-16 package and 8.5 mm minimum for the WB SOIC-16 package.

UL does not impose a clearance and creepage minimum for component level certifications. CSA certifies the clearance

and creepage limits as 3.9 mm minimum for the NB SOIC-16 package and 7.6 mm minimum for the WB SOIC-16

package.

2. To determine resistance and capacitance, the Si84xx is converted into a 2-terminal device. Pins 1–8 are shorted

together to form the first terminal and pins 9–16 are shorted together to form the second terminal. The parameters are

then measured between these two terminals.

3. Measured from input pin to ground.