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MM74HC574SJX Datasheet(PDF) 3 Page - Fairchild Semiconductor |
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MM74HC574SJX Datasheet(HTML) 3 Page - Fairchild Semiconductor |
3 / 8 page 3 www.fairchildsemi.com AC Electrical Characteristics VCC 5V, TA 25qC, tr tf 6 ns AC Electrical Characteristics VCC 2.0 6.0V, CL 50 pF, tr tf 6 ns (unless otherwise specified) Symbol Parameter Conditions Typ Guaranteed Units Limit fMAX Maximum Operating Frequency 60 33 MHz tPHL, tPLH Maximum Propagation Delay, Clock to Q CL 45 pF 17 27 ns tPZH, tPZL Maximum Output Enable Time RL 1 k: 19 28 ns CL 45 pF tPHZ, tPLZ Maximum Output Disable Time RL 1 k: 14 25 ns CL 5 pF tS Minimum Setup Time, Data to Clock 10 12 ns tH Minimum Hold Time, Clock to Data 35ns tW Minimum Pulse Clock Width 8 15 ns Symbol Parameter Conditions VCC TA 25qCTA 40 to 85qCTA 55 to 125qC Units Typ Guaranteed Limits fMAX Maximum Operating Frequency CL 50 pF 2.0V 33 28 23 MHz 4.5V 30 24 20 6.0V 35 28 23 tPHL, tPLH Maximum Propagation CL 50 pF 2.0V 18 30 38 45 ns Delay, Clock to Q CL 150 pF 2.0V 51 155 194 233 CL 50 pF 4.5V 13 23 29 35 ns CL 150 pF 4.5V 19 31 47 47 CL 50 pF 6.0V 12 20 25 30 ns CL 150 pF 6.0V 18 27 34 41 tPZH, tPZL Maximum Output Enable RL 1 k: Time CL 50 pF 2.0V 22 30 38 45 ns CL 150 pF 2.0V 59 180 225 270 CL 50 pF 4.5V 14 28 35 42 ns CL 150 pF 4.5V 20 36 45 54 CL 50 pF 6.0V 12 24 30 36 ns CL 150 pF 6.0V 18 31 39 47 tPHZ, tPLZ Maximum Output Disable Time RL 1 k: 2.0V 15 30 38 45 ns CL 50 pF 4.5V 12 25 31 38 6.0V 10 21 27 32 tS Minimum Setup Time 2.0V 6 12 15 18 ns Data to Clock 4.5V 20 25 30 6.0V 17 21 25 tH Minimum Hold Time 2.0V 15 6 8 ns Clock to Data 4.5V 0 0 0 6.0V 0 0 0 tTHL, tTLH Maximum Output Rise CL 50 pF 2.0V 6 12 15 18 ns and Fall Time 4.5V 7 12 15 18 6.0V 6 10 13 15 tW Minimum Clock Pulse Width 2.0V 30 15 20 24 ns 4.5V 9 16 20 24 6.0V 8 14 18 20 tr,tf Maximum Clock Input Rise 2.0V 1000 1000 1000 ns and Fall Time 4.5V 500 500 500 6.0V 400 400 400 CPD Power Dissipation Capacitance OC VCC 5 pF (Note 5) (per latch) OC GND 58 CIN Maximum Input Capacitance 5 10 10 10 pF |
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