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IDT70V25L15PFG Datasheet(PDF) 15 Page - Integrated Device Technology

Part # IDT70V25L15PFG
Description  HIGH-SPEED 3.3V STATIC RAM
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT70V25L15PFG Datasheet(HTML) 15 Page - Integrated Device Technology

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6.42
15
IDT70V35/34S/L (IDT70V25/24S/L)
High-Speed 3.3V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
Timing Waveform of Semaphore Read after Write Timing, Either Side(1)
Timing Waveform of Semaphore Write Contention(1,3,4)
NOTES:
1. DOR = DOL = VIL,
CER = CEL = VIH, or both UB & LB = VIH.
2. All timing is the same for left and right port. Port “A” may be either left or right port. Port “B” is the opposite from port “A”.
3. This parameter is measured from R/
W"A" or SEM"A" going HIGH to R/W"B" or SEM"B" going HIGH.
4. If tSPS is not satisfied, there is no guarantee which side will obtain the semaphore flag.
NOTES:
1.
CE = VIH or UB & LB = VIH for the duration of the above timing (both write and read cycle).
2. “DATAOUT VALID” represents all I/O's (I/O0-I/O17 for IDT70V35/34) and (I/O0-I/O15 for IDT70V25/24) equal to the semaphore value.
SEM
5624 drw 11
tAW
tEW
tSOP
I/O0
VALID ADDRESS
tSAA
R/
W
tWR
tOH
tACE
VALID ADDRESS
DATAIN
VALID
DATAOUT
tDW
tWP
tDH
tAS
tSWRD
tAOE
Read Cycle
Write Cycle
A0-A2
OE
VALID(2)
SEM"A"
5624 drw 12
tSPS
MATCH
R/
W"A"
MATCH
A0"A"-A2"A"
SIDE
"A"
(2)
SEM"B"
R/
W"B"
A0"B"-A2"B"
SIDE
(2)
"B"
,


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