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TPS65320QPWPRQ1 Datasheet(PDF) 24 Page - Texas Instruments |
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TPS65320QPWPRQ1 Datasheet(HTML) 24 Page - Texas Instruments |
24 / 34 page ![]() out out ss ssavg C V 0.8 T I ´ ´ > out max in in SW I 0.25 V C f ´ D = ´ TPS65320-Q1 SLVSAY9A – DECEMBER 2012 – REVISED APRIL 2013 www.ti.com (30) Table 3. Capacitor Types VENDOR VALUE ( μF) EIA Size VOLTAGE DIALECTRIC COMMENTS 1 to 2.2 100 V 1210 GRM32 series 1 to 4.7 50 V Murata 1 100 V 1206 GRM31 series 1 to 2.2 50 V X7R 1 to 4.7 50 V 1210 1 100 V AVX X7R dielectric series 1 to 4.7 50 V 1812 1 to 2.2 100 V Slow-Start Capacitor The slow-start capacitor determines the minimum amount of time it takes for the output voltage to reach its nominal programmed value during power up. This is useful if a load requires a controlled voltage-slew rate. This is also useful if the output capacitance is large and requires large amounts of current to charge the capacitor quickly to the output voltage level. The large currents necessary to charge the capacitor may make the TPS65320-Q1 device reach the current limit, or excessive current draw from the input power supply may cause the input voltage rail to sag. Limiting the output voltage-slew rate solves both of these problems. The slow-start time must be long enough to allow the regulator to charge the output capacitor up to the output voltage without drawing excessive current. One can use Equation 31 to find the minimum slow-start time, tss, necessary to charge the output capacitor, COUT, from 10% to 90% of the output voltage, VOUT, with an average slow-start current of Issavg. In the example, to charge the effective output capacitance of 44 µF up to 5 V while only allowing the average output current to be 3 A would require a 0.088-ms slow-start time. After knowing the slow-start timen, one can calculate the slow start capacitor value using Equation 1. For the example circuit, the slow-start time is not too critical, because the output-capacitor value is 2 × 22 µF, which does not require much current to charge to 5 V. The example circuit has the slow-start time set to an arbitrary value of 1 ms, which requires a 3.125-nF slow start capacitor. This design uses the next-larger standard value of 3.3 nF. (31) Bootstrap Capacitor Selection Connect a 0.1-µF ceramic capacitor between the BOOT and SW pins for proper operation. TI recommends using a ceramic capacitor with X5R or better-grade dielectric. The capacitor should have a 10-V or higher voltage rating. Output Voltage and Feedback Resistors Selection The voltage divider of R2 and R3 sets the output voltage. For the example design, the selected value of R3 is 10 k Ω, and the calculated value of R2 is 53.6 kΩ. Due to current leakage of the VFB1 pin, the current flowing through the feedback network should be greater than 1 μA in order to maintain the output-voltage accuracy. Choosing higher resistor values decreases the quiescent current and improves efficiency at low output currents, but may introduce noise immunity problems. Compensation There are several methods used to compensate dc-dc regulators. The method presented here is easy to calculate and ignores the effects of the slope compensation that is internal to the device. Ignoring the slope compensation usually causes the actual crossover frequency to be lower than the crossover frequency used in the calculations. This method assumes the crossover frequency is between the modulator pole and the ESR zero, and the ESR zero is at least 10 times greater than the modulator pole. 24 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: TPS65320-Q1 |
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