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TPS65320QPWPRQ1 Datasheet(PDF) 12 Page - Texas Instruments |
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TPS65320QPWPRQ1 Datasheet(HTML) 12 Page - Texas Instruments |
12 / 34 page ![]() T 1.0888 sw 206033 R (k ) f (kHz) W = ss ss ss ref T (ms) I (µA) C (nF) V (V) 0.8 ´ = ´ TPS65320-Q1 SLVSAY9A – DECEMBER 2012 – REVISED APRIL 2013 www.ti.com Slow-Start/Tracking Pin (SS/TR) The TPS65320-Q1 effectively uses the lower voltage of the internal voltage reference or the SS/TR pin voltage as the reference voltage of the power supply and regulates the output accordingly. A capacitor on the SS/TR pin to ground implements a slow-start time. The TPS65320-Q1 has an internal pullup current source of 2 µA that charges the external slow-start capacitor. Equation 1 shows the calculations for the slow start time (10% to 90%). The voltage reference (VREF) is 0.8 V and the slow-start current (ISS) is 2 µA. The slow-start capacitor should remain lower than 0.47 μF and greater than 0.47 nF. (1) At power up, the TPS65320-Q1 does not start switching until the slow-start pin discharges to less than 40 mV to ensure a proper power up. Also, on exceeding the VIN UVLO, pulling the EN pin below the enable threshold, or the occurrence a thermal shutdown event during normal operation, the TPS65320-Q1 stops switching, which requires discharging the SS/TR pin to 40 mV. Overload Recovery Circuit The TPS65320-Q1 has an overload recovery (OLR) circuit. The OLR circuit slow-starts the output from the overload voltage to the nominal regulation voltage on removal of the fault condition. The OLR circuit discharges the SS/TR pin to a voltage slightly greater than the VFB1 pin voltage using an internal pulldown of 382 µA when the error amplifier changes to a high voltage from a fault condition. On removal of the fault condition, the output slow-starts from the fault voltage to nominal output voltage. Constant Switching Frequency and Timing Resistor (RT/CLK Pin) The switching frequency of the TPS65320-Q1 is adjustable over a wide range from approximately 100 kHz to 2500 kHz by placing a resistor on the RT/CLK pin. The RT/CLK pin voltage is typically 0.5 V and must have a resistor to ground to set the switching frequency. To determine the timing resistance for a given switching frequency, use Equation 2 or the curves in Figure 6. To reduce the solution size, the user typically sets the switching frequency as high as possible, but consider tradeoffs of the supply efficiency, maximum input voltage, and minimum controllable on-time. The minimum controllable on-time is typically 100 ns and limits the maximum operating input voltage. The frequency-shift circuit also limits the maximum switching frequency. The following sections discuss more details of the maximum switching frequency. (2) Overcurrent Protection and Frequency Shift The TPS65320-Q1 implements current mode control, which uses the COMP pin voltage to turn off the high-side MOSFET on a cycle-by-cycle basis. During each cycle, the switch current and COMP pin voltage are compared. When the peak switch current intersects the COMP voltage, the high-side switch turns off. During overcurrent conditions that pull the output voltage low, the error amplifier responds by driving the COMP pin high, increasing the switch current. Internal clamping of the error-amplifier output functions as a switch-current limit. The TPS65320-Q1 implements a frequency shift. The switching frequency is divided by 8, 4, 2, and 1 as the voltage ramps from 0 to 0.8 volts on the VFB1 pin. During short-circuit events (particularly with high-input-voltage applications), the control loop has a finite minimum controllable on-time, and the output has a low voltage. During the switch on-time, the inductor current ramps to the peak current limit because of the high input voltage and minimum on-time. During the switch off-time, the inductor would normally not have enough off-time and output voltage for the inductor to ramp down by the ramp-up amount. The frequency shift effectively increases the off- time, allowing the current to ramp down. Selecting the Switching Frequency The switching frequency that is selected should be the lower value of the two equations, Equation 3 and Equation 4. Equation 3 is the maximum switching frequency limitation set by the minimum controllable on-time. Setting the switching frequency above this value causes the regulator to skip switching pulses. The device maintains regulation, but pulse-skipping leads to high inductor current and a significant increase in output ripple voltage. 12 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: TPS65320-Q1 |
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