TPS65320-Q1

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SLVSAY9A – DECEMBER 2012 – REVISED APRIL 2013

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE AND ORDERING INFORMATION

For the most current package and ordering information see the Package Option Addendum at the end of this

document, or see the TI website at www.ti.com.

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

ABSOLUTE MAXIMUM RATINGS

(1)

over operating free-air temperature range (unless otherwise noted)

VALUE

UNIT

VIN

–0.3 to 45

Supply inputs

V

VIN_LDO

–0.3 to 20

Control

EN1, EN2

–0.3 to 45

V

FB1

–0.3 to 3.6

–0.3 to 40

SW

–2 V for 30 ns

BOOT

–0.3 to 46

Buck

V

converter

BOOT-SW

8

COMP

–0.3 to 3.6

SS

–0.3 to 3.6

RT/CLK, SS

–0.3 to 3.6

LDO_OUT

–0.3 to 7

LDO

FB2

–0.3 to 7

V

regulator

nRST

–0.3 to 7

Human-body model (HBM) AEC-Q100 classification level H2

2

kV

Electrostatic

discharge

Corner pins

750

Charged-device model (CBM) AEC-Q100

V

(ESD) ratings

classification level C3B

All other pins

500

Operating ambient temperature

125

°C

Storage temperature range

–55 to 165

°C

Operating junction temperature range

–40 to 150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

THERMAL INFORMATION

TPS65320-Q1

UNIT

PWP (14 PINS)

Junction-to-ambient thermal resistance

49.9

Junction-to-case (top) thermal resistance

31

Junction-to-board thermal resistance

26.6

°C/W

Junction-to-top characterization parameter

1

Junction-to-board characterization parameter

26.4

Junction-to-case (bottom) thermal resistance

3.7

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

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