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LM324DTBR2G Datasheet(PDF) 6 Page - ON Semiconductor |
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LM324DTBR2G Datasheet(HTML) 6 Page - ON Semiconductor |
6 / 15 page LM324, LM324A, LM224, LM2902, LM2902V, NCV2902 http://onsemi.com 6 CIRCUIT DESCRIPTION The LM324 series is made using four internally compensated, two−stage operational amplifiers. The first stage of each consists of differential input devices Q20 and Q18 with input buffer transistors Q21 and Q17 and the differential to single ended converter Q3 and Q4. The first stage performs not only the first stage gain function but also performs the level shifting and transconductance reduction functions. By reducing the transconductance, a smaller compensation capacitor (only 5.0 pF) can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of Q20 and Q18. Another feature of this input stage is that the input common mode range can include the negative supply or ground, in single supply operation, without saturating either the input devices or the differential to single−ended converter. The second stage consists of a standard current source load amplifier stage. Figure 2. Large Signal Voltage Follower Response VCC = 15 Vdc RL = 2.0 kW TA = 25°C 5.0 ms/DIV Each amplifier is biased from an internal−voltage regulator which has a low temperature coefficient thus giving each amplifier good temperature characteristics as well as excellent power supply rejection. Single Supply Split Supplies VCC VEE/GND 3.0 V to VCC(max) 1 2 3 4 VCC 1 2 3 4 VEE 1.5 V to VCC(max) 1.5 V to VEE(max) Figure 3. 70 60 50 40 30 20 10 0 1.0 10 100 10000 LOAD CAPACITANCE (pF) Phase Margin Figure 4. Gain and Phase Margin 1000 70 60 50 40 30 20 10 0 Gain Margin |
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