REV. E

AD630

–7–

The collectors of each switching cell connect to an input trans-

The deselected cell blocks the bias to its input stage which, as a

consequence, remains off.

The structure of the transconductance stages is such that it

presents a high impedance at its input terminals and draws no

bias current when deselected. The deselected input does not

interfere with the operation of the selected input ensuring maxi-

mum channel separation.

Another feature of the input structure is that it enhances the

slew rate of the circuit. The current output of the active

stage follows a quasi-hyperbolic-sine relationship to the dif-

ferential input voltage. This means that the greater the input

voltage, the harder this stage will drive the output integrator,

and the faster the output signal will move. This feature

helps ensure rapid, symmetric settling when switching between

inverting and noninverting closed loop configurations.

The output section of the AD630 includes a current mirror-

load (Q24 and Q25), an integrator-voltage gain stage (Q32),

and a complementary output buffer (Q44 and Q74). The outputs

of both transconductance stages are connected in parallel to

the current mirror. Since the deselected input stage produces

no output current and presents a high impedance at its out-

puts, there is no conflict. The current mirror translates the

differential output current from the active input transconductance

amplifier into single-ended form for the output integrator. The

complementary output driver then buffers the integrator output

to produce a low impedance output.

OTHER GAIN CONFIGURATIONS

Many applications require switched gains other than the

±1 and

±2 which the self-contained applications resistors provide. The

AD630 can be readily programmed with three external resistors

over a wide range of positive and negative gain by selecting and

The feedback synthesis of the AD630 may also include reactive

impedance. The gain magnitudes will match at all frequencies if

the A impedance is made to equal the parallel combination of

the B and F impedances. The same considerations apply to the

AD630 as to conventional op amp feedback circuits. Virtually any

function that can be realized with simple noninverting “L net-

work” feedback can be used with the AD630. A common

arrangement is shown in Figure 6. The low frequency gain of

this circuit is 10. The response will have a pole (–3 dB) at a

frequency f

1/(2

π 100 kΩC) and a zero (3 dB from the high

frequency asymptote) at about 10 times this frequency. The

2 k

Ω resistor in series with each capacitor mitigates the loading

effect on circuitry driving this circuit, eliminates stability problems,

and has a minor effect on the pole-zero locations.

As a result of the reactive feedback, the high frequency com-

ponents of the switched input signal will be transmitted at

unity gain while the low frequency components will be ampli-

fied. This arrangement is useful in demodulators and lock-in

amplifiers. It increases the circuit dynamic range when the

modulation or interference is substantially larger than the

desired signal amplitude. The output signal will contain the

desired signal multiplied by the low frequency gain (which may

be several hundred for large feedback ratios) with the switching

signal and interference superimposed at unity gain.

C

A

B

10k

11.11k

12

100k

2k

C

2k

2

20

19

18

13

7

8

9

10

SEL B

SEL A

CHANNEL

STATUS

B/

A

Figure 6. AD630 with External Feedback

SWITCHED INPUT IMPEDANCE

The noninverting mode of operation is a high input impedance

configuration while the inverting mode is a low input impedance

configuration. This means that the input impedance of the

circuit undergoes an abrupt change as the gain is switched

under control of the comparator. If gain is switched when the

input signal is not zero, as it is in many practical cases, a tran-

sient will be delivered to the circuitry driving the AD630. In

most applications, this will require the AD630 circuit to be

driven by a low impedance source which remains “stiff ” at high

frequencies. Generally, this will be a wideband buffer amplifier.

FREQUENCY COMPENSATION

The AD630 combines the convenience of internal frequency

compensation with the flexibility of external compensation by

means of an optional self-contained compensation capacitor.

In gain of

±2 applications, the noise gain that must be addressed

for stability purposes is actually 4. In this circumstance, the

phase margin of the loop will be on the order of 60

° without the

optional compensation. This condition provides the maximum

bandwidth and slew rate for closed loop gains of |2| and above.

When the AD630 is used as a multiplexer, or in other configura-

tions where one or both inputs are connected for unity gain

feedback, the phase margin will be reduced to less than 20

°.

This may be acceptable in applications where fast slewing is a

first priority, but the transient response will not be optimum.

For these applications, the self-contained compensation capacitor

may be added by connecting Pin 12 to Pin 13. This connection

reduces the closed-loop bandwidth somewhat and improves the

phase margin.

For intermediate conditions, such as gain of

±1 where loop

attenuation is 2, use of the compensation should be determined

by whether bandwidth or settling response must be optimized.

The optional compensation should also be used when the AD630

is driving capacitive loads or whenever conservative frequency

compensation is desired.

OFFSET VOLTAGE NULLING

The offset voltages of both input stages and the comparator

have been pretrimmed so that external trimming will only be

required in the most demanding applications. The offset adjust-

ment of the two input channels is accomplished by means of a

differential and common-mode scheme. This facilitates fine

adjustment of system errors in switched gain applications. With