REV. E

AD630

–6–

TWO WAYS TO LOOK AT THE AD630

The functional block diagram of the AD630 (see page 1) shows

the pin connections of the internal functions. An alternative archi-

tectural diagram is shown in Figure 1. In this diagram, the

individual A and B channel preamps, the switch, and the inte-

grator output amplifier are combined in a single op amp. This

amplifier has two differential input channels, only one of which

is active at a time.

11

15

2

20

19

18

17

8

7

12

14

13

9

10

2.5k

10k

1

16

2.5k

10k

SEL B

SEL A

B/A

A

B

Figure 1. Architectural Block Diagram

HOW THE AD630 WORKS

The basic mode of operation of the AD630 may be easier to recog-

nize as two fixed gain stages which can be inserted into the signal

path under the control of a sensitive voltage comparator. When

the circuit is switched between inverting and noninverting gain, it

provides the basic modulation/demodulation function. The AD630

is unique in that it includes laser wafer trimmed thin-film feed-

back resistors on the monolithic chip. The configuration shown in

Figure 2 yields a gain of

±2 and can be easily changed to ±1 by

The comparator selects one of the two input stages to complete

an operational feedback connection around the AD630. The

deselected input is off and has a negligible effect on the operation.

A

B

5k

10k

10k

2

20

19

18

13

15

16

14

9

10

Figure 2. AD630 Symmetric Gain (

±2)

connected for inverting feedback as shown in the inverting

gain configuration diagram in Figure 3. The amplifier has suffi-

virtual ground produced by the feedback connection. When the

sign of the comparator input is reversed, Input B will be dese-

lected and A will be selected. The new equivalent circuit will be

the noninverting gain configuration shown in Figure 4. In this

the amplifier drives this difference voltage to zero, the closed-loop

gain is unaffected.

The 5 k

Ω and the two 10 kΩ resistors on the AD630 chip can

be used to make a gain of 2 as shown below. By paralleling

the 10 k

Ω resistors to make R

Ω and omitting R

the circuit can be programmed for a gain of

± 1 (as shown in

Figure 9a). These and other configurations using the on-chip

resistors present the inverting inputs with a 2.5 k

Ω source imped-

ance. The more complete AD630 diagrams show 2.5 k

Ω resistors

available at the noninverting inputs which can be conveniently

used to minimize errors resulting from input bias currents.

5k

10k

Figure 3. Inverting Gain Configuration

5k

10k

10k

Figure 4. Noninverting Gain Configuration

CIRCUIT DESCRIPTION

The simplified schematic of the AD630 is shown in Figure 5.

It has been subdivided into three major sections, the comparator,

the two input stages, and the output integrator. The compara-

tor consists of a front end made up of Q52 and Q53, a flip-flop

load formed by Q3 and Q4, and two current steering switching

cells Q28, Q29 and Q30, Q31. This structure is designed so that

a differential input voltage greater than 1.5 mV in magnitude

applied to the comparator inputs will completely select one of

the switching cells. The sign of this input voltage determines

which of the two switching cells is selected.

20

11

3

4

5

6

19

2

18

13

12

SEL A

SEL B

DIFF

OFF ADJ

DIFF

OFF ADJ

CM

OFF ADJ

CM

OFF ADJ

COMP

Q74

Q44

CH B–

CH B+

CH A+

CH A–

Q4

Q3

Q28

Q31

Q30

Q32

C122

C121

Q52

Q53

Q65

Q34

Q33

Q62

Q35

Q36

Q67

Q70

Q25

Q24

Q29

10

9

8

Figure 5. AD630 Simplified Schematic