W9751G6KB-25 datasheet(17/87 Pages) WINBOND

Part #	W9751G6KB-25

Description	Double Data Rate architecture: two data transfers per clock cycle

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Manufacturer	WINBOND [Winbond]

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W9751G6KB

Publication Release Date: Sep. 03, 2012

- 17 -

Revision A04

For proper operation of adjust mode, WL = RL - 1 = AL + CL - 1 clocks and tDS/tDH should be met as

shown in Figure 7. For input data pattern for adjustment, DT0 - DT3 is a fixed order and is not affected

by burst type (i.e., sequential or interleave).

OCD adjust mode

OCD calibration mode exit

WR

WL

DQS

tDS tDH

DT0

CLK

DQS_in

CMD

DQ_in

DM

NOP

EMRS

NOP

EMRS

CLK

DT1

DT2

DT3

Figure 7

– OCD Adjust Mode

8.2.3.3

Drive Mode

Drive mode, both Drive (1) and Drive (0), is used for controllers to measure DDR2 SDRAM Driver

impedance. In this mode, all outputs are driven out tOIT

after “enter drive mode” command and all

output drivers are turned-off tOIT

after “OCD calibration mode exit” command as shown in Figure 8.

Enter Drive mode

OCD calibration mode exit

EMRS

NOP

CLK

DQS

CMD

DQ

tOIT

DQs high for Drive (1)

DQs low for Drive (0)

DQS high & DQS low for Drive (1), DQS low & DQS high for Drive (0)

CLK

HI-Z

Figure 8

– OCD Drive Mode

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