W9751G6KB-25 datasheet(1/87 Pages) WINBOND

Part #	W9751G6KB-25

Description	Double Data Rate architecture: two data transfers per clock cycle

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Manufacturer	WINBOND [Winbond]

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W9751G6KB

8M  4 BANKS  16 BIT DDR2 SDRAM

Publication Release Date: Sep. 03, 2012

- 1 -

Revision A04

Table of Contents-

1.

GENERAL DESCRIPTION ...................................................................................................................4

2.

FEATURES ...........................................................................................................................................4

3.

ORDER INFORMATION .......................................................................................................................5

4.

KEY PARAMETERS .............................................................................................................................5

5.

BALL CONFIGURATION ......................................................................................................................6

6.

BALL DESCRIPTION............................................................................................................................7

7.

BLOCK DIAGRAM ................................................................................................................................8

8.

FUNCTIONAL DESCRIPTION..............................................................................................................9

8.1

Power-up and Initialization Sequence ...................................................................................................9

8.2

Mode Register and Extended Mode Registers Operation ...................................................................10

8.2.1

Mode Register Set Command (MRS)...............................................................................10

8.2.2

Extend Mode Register Set Commands (EMRS) ..............................................................11

8.2.2.1

Extend Mode Register Set Command (1), EMR (1)................................................11

8.2.2.2

DLL Enable/Disable ................................................................................................12

8.2.2.3

Extend Mode Register Set Command (2), EMR (2)................................................13

8.2.2.4

Extend Mode Register Set Command (3), EMR (3)................................................14

8.2.3

Off-Chip Driver (OCD) Impedance Adjustment ................................................................15

8.2.3.1

Extended Mode Register for OCD Impedance Adjustment ....................................16

8.2.3.2

OCD Impedance Adjust ..........................................................................................16

8.2.3.3

Drive Mode .............................................................................................................17

8.2.4

On-Die Termination (ODT) ...............................................................................................18

8.2.5

ODT related timings .........................................................................................................18

8.2.5.1

MRS command to ODT update delay .....................................................................18

8.3

Command Function.............................................................................................................................20

8.3.1

Bank Activate Command..................................................................................................20

8.3.2

Read Command ...............................................................................................................20

8.3.3

Write Command ...............................................................................................................21

8.3.4

Burst Read with Auto-precharge Command.....................................................................21

8.3.5

Burst Write with Auto-precharge Command .....................................................................21

8.3.6

Precharge All Command ..................................................................................................21

8.3.7

Self Refresh Entry Command ..........................................................................................21

8.3.8

Self Refresh Exit Command .............................................................................................22

8.3.9

Refresh Command ...........................................................................................................22

8.3.10

No-Operation Command ..................................................................................................23

8.3.11

Device Deselect Command..............................................................................................23

8.4

Read and Write access modes ...........................................................................................................23

8.4.1

Posted CAS ....................................................................................................................23

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