W9751G6KB-25 datasheet(8/87 Pages) WINBOND

Part #	W9751G6KB-25

Description	Double Data Rate architecture: two data transfers per clock cycle

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Manufacturer	WINBOND [Winbond]

Direct Link	http://www.winbond.com

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8 / 87 page

W9751G6KB

Publication Release Date: Sep. 03, 2012

- 8 -

Revision A04

7.

BLOCK DIAGRAM

CKE

A10

DLL

CLOCK

BUFFER

COMMAND

DECODER

ADDRESS

BUFFER

REFRESH

COUNTER

COLUMN

COUNTER

CONTROL

SIGNAL

GENERATOR

MODE

REGISTER

COLUMN DECODER

SENSE AMPLIFIER

CELL ARRAY

BANK #2

COLUMN DECODER

SENSE AMPLIFIER

CELL ARRAY

BANK #0

COLUMN DECODER

SENSE AMPLIFIER

CELL ARRAY

BANK #3

DATA CONTROL

CIRCUIT

DQ

BUFFER

COLUMN DECODER

SENSE AMPLIFIER

CELL ARRAY

BANK #1

NOTE: The cell array configuration is 8192 * 1024 * 16

A0

A9

A11

A12

BA0

BA1

CS

RAS

CAS

WE

CLK

PREFETCH REGISTER

ODT

CONTROL

DQ0

|

DQ15

LDQS

UDQS

LDM

UDM

ODT

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W9751G6KB-25 Datasheet(PDF) 8 Page - Winbond

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