W9751G6KB-25 datasheet(79/87 Pages) WINBOND

Part #	W9751G6KB-25

Description	Double Data Rate architecture: two data transfers per clock cycle

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Manufacturer	WINBOND [Winbond]

Direct Link	http://www.winbond.com

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79 / 87 page

W9751G6KB

Publication Release Date: Sep. 03, 2012

- 79 -

Revision A04

11.19

Burst read operation followed by precharge: RL=4 (AL=0, CL=4, BL=8,

tRTP > 2clks)

Dout

A0

Dout

A1

Dout

A2

Dout

A3

NOP

Precharge

NOP

Post CAS

READ A

Bank A

Activate

T0

T1

T2

T3

T4

T5

T6

T7

CLK/CLK

CMD

DQS,

DQS

DQ's

T8

Dout

A5

Dout

A6

Dout

A7

Dout

A4

CL = 4

RL = 4

≥ tRAS

≥ tRTP

AL + BL/2 + max(RTP, 2) - 2 clks

≥ tRP

first 4-bit prefetch

second 4-bit prefetch

AL = 0

11.20

Burst write operation followed by precharge: WL = (RL-1) = 3

NOP

Post CAS

WRITE A

Precharge

T0

T1

T2

T3

T4

T5

T6

T7

CLK/CLK

CMD

DQS,

DQS

DQ's

T8

WL = 3

Completion of the Burst Write

DIN

A0

DIN

A1

DIN

A2

DIN

A3

≥ tWR

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W9751G6KB-25 Datasheet(PDF) 79 Page - Winbond

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