W9751G6KB-25 datasheet(59/87 Pages) WINBOND

Part #	W9751G6KB-25

Description	Double Data Rate architecture: two data transfers per clock cycle

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Manufacturer	WINBOND [Winbond]

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W9751G6KB

Publication Release Date: Sep. 03, 2012

- 59 -

Revision A04

tIS

tIH

tIS

tIH

tangent

line

DC to VREF

region

VDDQ

VIH(ac)min

VIH(dc)min

VREF(dc)

VIL(dc)max

VIL(ac)max

VSS

ΔTF

ΔTR

DC to VREF

region

nominal

line

tangent

line

nominal

line

Hold Slew Rate

Rising Signal

=

tangent line[VREF(dc) - VIL(dc)max]

Hold Slew Rate

Falling Signal =

tangent line[VIH(dc)min - VREF(dc)]

CLK

ΔTR

ΔTF

Figure 23

– Illustration of tangent line for tIH

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