W9751G6KB-25 datasheet(53/87 Pages) WINBOND

Part #	W9751G6KB-25

Description	Double Data Rate architecture: two data transfers per clock cycle

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Manufacturer	WINBOND [Winbond]

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W9751G6KB

Publication Release Date: Sep. 03, 2012

- 53 -

Revision A04

31. These parameters are specified per their average values, however it is understood that the following relationship between

the average timing and the absolute instantaneous timing holds at all times. (Min and max of SPEC values are to be used

for calculations in the table below.)

PARAMETER

SYMBOL

MIN

MAX

UNIT

Absolute clock period

tCK(abs)

tCK(avg),min + tJIT(per),min

tCK(avg),max + tJIT(per),max

pS

Absolute clock HIGH pulse width

tCH(abs)

tCH(avg),min x tCK(avg),min +

tJIT(duty),min

tCH(avg),max x tCK(avg),max +

tJIT(duty),max

pS

Absolute clock LOW pulse width

tCL(abs)

tCL(avg),min x tCK(avg),min +

tJIT(duty),min

tCL(avg),max x tCK(avg),max +

tJIT(duty),max

pS

Examples: 1) For DDR2-667, tCH(abs),min = ( 0.48 x 3000 pS ) - 125 pS = 1315 pS

2) For DDR2-1066, tCH(abs),min = ( 0.48 x 1875 pS ) - 75 pS = 825 pS

32. tHP is the minimum of the absolute half period of the actual input clock. tHP is an input parameter but not an input

specification parameter. It is used in conjunction with tQHS to derive the DRAM output timing tQH. The value to be used for

tQH calculation is determined by the following equation;

tHP = Min ( tCH(abs), tCL(abs) ),

where,

tCH(abs) is the minimum of the actual instantaneous clock HIGH time;

tCL(abs) is the minimum of the actual instantaneous clock LOW time;

33. tQHS accounts for:

1) The pulse duration distortion of on-chip clock circuits, which represents how well the actual tHP at the input is

transferred to the output; and

2) The worst case push-out of DQS on one transition followed by the worst case pull-in of DQ on the next transition,

both of which are independent of each other, due to data pin skew, output pattern effects, and p-channel to n-

channel variation of the output drivers

34. tQH = tHP

– tQHS, where:

tHP is the minimum of the absolute half period of the actual input clock; and

tQHS is the specification value under the max column.

{The less half-pulse width distortion present, the larger the tQH value is; and the larger the valid data eye will be.}

Examples:

1) If the system provides tHP of 1315 pS into a DDR2-667 SDRAM, the DRAM provides tQH of 975 pS minimum.

2) If the system provides tHP of 1420 pS into a DDR2-667 SDRAM, the DRAM provides tQH of 1080 pS minimum.

3) If the system provides tHP of 825 pS into a DDR2-1066 SDRAM, the DRAM provides tQH of 575 pS minimum.

4) If the system provides tHP of 900 pS into a DDR2-1066 SDRAM, the DRAM provides tQH of 650 pS minimum.

35. When the device is operated with input clock jitter, this parameter needs to be derated by the actual tERR(6-10per) of the

input clock. (output deratings are relative to the SDRAM input clock.)

Examples:

1) If the measured jitter into a DDR2-667 SDRAM has tERR(6-10per),min = - 272 pS and tERR(6-10per),max = +

293 pS, then tDQSCK,min(derated) = tDQSCK,min - tERR(6-10per),max = - 400 pS - 293 pS = - 693 pS and

tDQSCK,max(derated) = tDQSCK,max - tERR(6-10per),min = 400 pS + 272 pS = + 672 pS.

Similarly, tLZ(DQ) for DDR2-667 derates to tLZ(DQ),min(derated) = - 900 pS - 293 pS = - 1193 pS and

tLZ(DQ),max(derated) = 450 pS + 272 pS = + 722 pS. (Caution on the min/max usage!)

2) If the measured jitter into a DDR2-1066 SDRAM has tERR(6-10per),min = - 202 pS and tERR(6-10per),max = +

223 pS, then tDQSCK,min(derated) = tDQSCK,min - tERR(6-10per),max = - 300 pS - 223 pS = - 523 pS and

tDQSCK,max(derated) = tDQSCK,max - tERR(6-10per),min = 300 pS + 202 pS = + 502 pS.

Similarly, tLZ(DQ) for DDR2-1066 derates to tLZ(DQ),min(derated) = - 700 pS - 223 pS = - 923 pS and

tLZ(DQ),max(derated) = 350 pS + 202 pS = + 552 pS. (Caution on the min/max usage!)

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