W9751G6KB-25 datasheet(50/87 Pages) WINBOND

Part #	W9751G6KB-25

Description	Double Data Rate architecture: two data transfers per clock cycle

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W9751G6KB

Publication Release Date: Sep. 03, 2012

- 50 -

Revision A04

25. New

units, „tCK(avg)‟ and „nCK‟, are introduced in DDR2-667, DDR2-800 and DDR2-1066.

Unit „tCK(avg)‟ represents the actual tCK(avg) of the input clock under operation.

Unit „nCK‟ represents one clock cycle of the input clock, counting the actual clock edges.

Examples:

For DDR2-667/800: tXP = 2 [nCK] means; if Power Down exit is registered at Tm, an Active command may be

registered at Tm+2, even if (Tm+2 - Tm) is 2 x tCK(avg) + tERR(2per),min.

For DDR2-1066: tXP = 3 [nCK] means; if Power Down exit is registered at Tm, an Active command may be

registered at Tm+3, even if (Tm+3 - Tm) is 3 x tCK(avg) + tERR(3per),min.

26. These parameters are measured from a command/address signal (CKE,

CS , RAS , CAS , WE , ODT, BA0, A0, A1, etc.)

transition edge to its respective clock signal (CLK/

CLK ) crossing. The spec values are not affected by the amount of clock

jitter applied (i.e. tJIT(per), tJIT(cc), etc.), as the setup and hold are relative to the clock signal crossing that latches the

command/address. That is, these parameters should be met whether clock jitter is present or not.

27. If tDS or tDH is violated, data corruption may occur and the data must be re-written with valid data before a valid READ can

be executed.

28. These parameters are measured from a data strobe signal ((L/U)DQS/

DQS ) crossing to its respective clock signal

(CLK/

CLK ) crossing. The spec values are not affected by the amount of clock jitter applied (i.e. tJIT(per), tJIT(cc), etc.), as

these are relative to the clock signal crossing. That is, these parameters should be met whether clock jitter is present or not.

29. These parameters are measured from a data signal ((L/U)DM, (L/U)DQ0, (L/U)DQ1, etc.) transition edge to its respective

data strobe signal ((L/U)DQS/

DQS ) crossing.

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