W9412G2IB4 datasheet(31/50 Pages) WINBOND

Part #	W9412G2IB4

Description	Double Data Rate architecture; two data transfers per clock cycle

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Manufacturer	WINBOND [Winbond]

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W9412G2IB

Publication Release Date: Aug. 30, 2010

- 31 -

Revision A06

CLK

VSS

VICK

VX

VICK

VID(AC)

0 V Differential

VISO

VISO(min)

VISO(max)

VSS

(16) tAC and tDQSCK depend on the clock jitter. These timing are measured at stable clock.

(17) A maximum of eight AUTO REFRESH commands can be posted to any given DDR SDRAM device.

(18) tDAL = (tWR/tCK) + (tRP/tCK)

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