W9412G2IB

Publication Release Date: Aug. 30, 2010

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Revision A06

7.10.3

CAS Latency field (A6 to A4)................................................................................................17

7.10.4

DLL Reset bit (A8)................................................................................................................17

7.10.5

Mode Register /Extended Mode register change bits (BA0, BA1) ........................................17

7.10.6

Extended Mode Register field ..............................................................................................18

7.10.7

Reserved field ......................................................................................................................18

8. OPERATION MODE.........................................................................................................................................19

8.1

Simplified Truth Table.........................................................................................................................19

8.2

Function Truth Table ..........................................................................................................................20

8.3

Function Truth Table, continued.........................................................................................................21

8.4

Function Truth Table, continued.........................................................................................................22

8.5

Function Truth Table for CKE.............................................................................................................23

8.6

Simplified Stated Diagram ..................................................................................................................24

9. ELECTRICAL CHARACTERISTICS.................................................................................................................25

9.1

Absolute Maximum Ratings................................................................................................................25

9.2

Recommended DC Operating Conditions ..........................................................................................25

9.3

Capacitance .......................................................................................................................................26

9.4

Leakage and Output Buffer Characteristics........................................................................................26

9.5

DC Characteristics..............................................................................................................................27

9.6

AC Characteristics and Operating Condition ......................................................................................28

9.7

AC Test Conditions.............................................................................................................................29

10. TIMING WAVEFORMS ....................................................................................................................................32

10.1

Command Input Timing ......................................................................................................................32

10.2

Timing of the CLK Signals ..................................................................................................................32

10.3

Read Timing (Burst Length = 4) .........................................................................................................33

10.4

Write Timing (Burst Length = 4)..........................................................................................................34

10.5

DM, DATA MASK (W9412G2IB) ........................................................................................................35

10.6

Mode Register Set (MRS) Timing.......................................................................................................36

10.7

Extend Mode Register Set (EMRS) Timing ........................................................................................37

10.8

Auto-precharge Timing (Read Cycle, CL = 2).....................................................................................38

10.9

Auto-precharge Timing (Read cycle, CL = 2), continued....................................................................39

10.10 Auto-precharge Timing (Write Cycle) .................................................................................................40

10.11 Read Interrupted by Read (CL = 2, BL = 2, 4, 8)................................................................................41

10.12 Burst Read Stop (BL = 8) ...................................................................................................................41

10.13 Read Interrupted by Write & BST (BL = 8) .........................................................................................42

10.14 Read Interrupted by Precharge (BL = 8) ............................................................................................42

10.15 Write Interrupted by Write (BL = 2, 4, 8).............................................................................................43

10.16 Write Interrupted by Read (CL = 2, BL = 8) ........................................................................................43

10.17 Write Interrupted by Read (CL = 3, BL = 4) ........................................................................................44

10.18 Write Interrupted by Precharge (BL = 8).............................................................................................44