W9412G2IB4 datasheet(9/50 Pages) WINBOND

Part #	W9412G2IB4

Description	Double Data Rate architecture; two data transfers per clock cycle

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Manufacturer	WINBOND [Winbond]

Direct Link	http://www.winbond.com

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W9412G2IB

Publication Release Date: Aug. 30, 2010

- 9 -

Revision A06

6. BLOCK DIAGRAM

CKE

A8

DLL

CLOCK

BUFFER

COMMAND

DECODER

ADDRESS

BUFFER

REFRESH

COUNTER

COLUMN

COUNTER

CONTRO

L

SIGNAL

GENERATO

R

MODE

REGISTER

COLUMN DECODER

SENSE AMPLIFIER

CELL ARRAY

BANK #2

COLUMN DECODER

SENSE AMPLIFIER

CELL ARRAY

BANK #0

COLUMN DECODER

SENSE AMPLIFIER

CELL ARRAY

BANK #3

DATA CONTROL

CIRCUIT

DQ

BUFFER

COLUMN DECODER

SENSE AMPLIFIER

CELL ARRAY

BANK #1

NOTE: The cell array configuration is 4096 * 256 * 32

A0

A7

A9, A10, A11

BA1

BA0

CS

RAS

CAS

WE

CLK

DQ0

DQn

PREFETCH REGISTER

DMn

DQSn

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