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AB28F800B5T80 Datasheet(PDF) 15 Page - Intel Corporation |
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AB28F800B5T80 Datasheet(HTML) 15 Page - Intel Corporation |
15 / 44 page E 28F200B5, 28F004/400B5, 28F800B5 15 PRELIMINARY Table 3. Bus Operations for Word-Wide Mode (BYTE# = VIH) Mode Notes RP# CE# OE# WE# A9 A0 VPP DQ0–15 Read 1,2,3 VIH VIL VIL VIH XXX DOUT Output Disable VIH VIL VIH VIH X X X High Z Standby VIH VIH XXXXX High Z Deep Power-Down 9 VIL XXXXXX High Z Intelligent Identifier (Mfr.) 4VIH VIL VIL VIH VID VIL X 0089 H Intelligent Identifier (Device) 4,5 VIH VIL VIL VIH VID VIH X See Table 5 Write 6,7,8 VIH VIL VIH VIL XXX DIN Table 4. Bus Operations for Byte-Wide Mode (BYTE# = VIL) Mode Note RP# CE# OE# WE# A9 A0 A–1 VPP DQ0–7 DQ8–14(10) Read 1,2,3 VIH VIL VIL VIH XXXX DOUT High Z Output Disable VIH VIL VIH VIH XXXX High Z High Z Standby VIH VIH XX XXXX High Z High Z Deep Power- Down 9VIL XXX XXXX High Z High Z Intelligent Identifier (Mfr.) 4VIH VIL VIL VIH VID VIL X X 89H High Z Intelligent Identifier (Device) 4,5 VIH VIL VIL VIH VID VIH X X See Table 5 High Z Write 6,7,8 VIH VIL VIH VIL XXXX DIN High Z NOTES: 1. Refer to DC Characteristics. 2. X can be VIL, VIH for control pins and addresses, VPPLK or VPPH for VPP. 3. See DC Characteristics for VPPLK, VPPH1, VPPH2, VHH, VID voltages. 4. Manufacturer and device codes may also be accessed via a CUI write sequence, A0 selects, all other addresses = X. 5. See Table 5 for device IDs. 6. Refer to Table 7 for valid DIN during a write operation. 7. Command writes for block erase or program are only executed when VPP = VPPH1 or VPPH2. 8. To program or erase the boot block, hold RP# at VHH or WP# at VIH. See Section 3.3. 9. RP# must be at GND ± 0.2 V to meet the maximum deep power-down current specified. 10. This column does not apply to the E28F004B5 since it is a x8-only device. |
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