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AOZ7111 Datasheet(PDF) 8 Page - Alpha & Omega Semiconductors |
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AOZ7111 Datasheet(HTML) 8 Page - Alpha & Omega Semiconductors |
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8 / 15 page  AOZ7111 Rev. 1.0 January 2013 www.aosmd.com Page 8 of 15 Detailed Description The AOZ7111 is a voltage mode active power factor correction (PFC) controller designed for cost-effective boost PFC applications that operate in critical conduction mode (CRM). Its voltage mode scheme does not require an AC input line-sensing network, usually necessary for a current mode CRM PFC controller. It gets the ZCD signal pulse from the current sense resistor; therefore, ZCD auxiliary winding is not needed. AOZ7111 features output over-voltage protection, over- current protection, open-feedback protection, and under- voltage lockout protection. A unique AC input fault detection circuit makes the system more robust during the AC absent test. The additional OVP pin can be used to double check the output voltage if the feedback resistor gets damaged. The controller also implements comprehensive safety features for robust designs. The AOZ7111 is available in SO-8 package. Error Amplifier Regulation AOZ7111 regulates the boost output voltage using an internal transconductance error amplifier (EA) with a typical transconductance value of 100µS. The advantage in using a transconductance error amplifier is that the INV pin voltage is only determined by the resistor divider network connected to the output voltage, not the operation of the amplifier. This enables the INV pin to be used for sensing over-voltage or under-voltage conditions independently of the error amplifier. The negative terminal of the EA is pinned out to INV, the positive terminal is connected to a 2.5V (±1.8%) reference (VREF), and the EA output is pinned out COMP. The output of the error amplifier (COMP) is connected to the PWM comparator and controls the on-time of the OUT output. The sink and source current capability of the error amplifier is approximate 10µA during normal operation. When the INV pin voltage is over the normal operating conditions (VINV>2.6V, or VINV<2.4V if the error is large), additional circuitry is activated to enhance the slew-rate of the error amplifier, it enables fast line and load transient response. Figure 2. Non-linear Gain Characteristics The output voltage of PFC contains a high ripple frequency, 2 times the AC power line (50Hz or 60Hz). The VOUT ripple is attenuated by the regulation loop to ensure VCOMP is constant during the AC line cycle. In order to obtain a stable operation and ensure VCOMP is constant during the AC line cycle, the bandwidth should typically be set below 20Hz so that the regulation block output may be relatively constant over a given AC line cycle. Soft-Start AOZ7111 employs an internal soft-start function to suppress inrush current and overshoot of output voltage during the startup. The soft-start circuit works after UVLO and standby are released and before the soft-start cancellation voltage is exceeded. During the soft-start, the OTA supplies a constant 10µA into the compensation network at the COMP pin. The voltage at this pin rises linearly as well as the amplitude of the input current. As soon as the output voltage VOUT reaches 95% of its rated level, the startup procedure is finished and the normal voltage control takes over. 100µS ICOMP INV 2.4V 2.6V 2.5V Source Sink 200µS |
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