NCP1608_10 datasheet(22/24 Pages) ONSEMI

Part #	NCP1608

Description	Critical Conduction Mode PFC Controller Utilizing a Transconductance Error Amplifier

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NCP1608

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22

BOOST DESIGN EQUATIONS Components are identified in Figure 1

Input rms Current

Iac +

Pout

h @ Vac

h (the efficiency of only the PFC

stage) is generally in the range of 90

− 95%. Vac is the rms ac line input

voltage.

Inductor Peak Current

IL(peak) +

2 @ 2 @ Pout

h @ Vac

The maximum inductor peak current

occurs at the minimum line input

voltage and maximum output power.

Inductor Value

L v

Vac2 @

Vout

2

* Vac @ h

2 @ Vout @ Pout @ fSW(MIN)

fSW(MIN) is the minimum desired

switching frequency. The maximum L

is calculated at both the minimum

line input voltage and maximum line

input voltage.

On Time

ton +

2 @ L @ Pout

h @ Vac 2

The maximum on time occurs at the

minimum line input voltage and max-

imum output power.

Off Time

toff +

ton

Vout

Vac@sinq@ 2

* 1

The off time is a maximum at the

peak of the ac line voltage and ap-

proaches zero at the ac line zero

crossings. Theta (q) represents the

angle of the ac line voltage.

Switching Frequency

fSW +

Vac 2 @ h

2 @ L @ Pout

@ 1 *

Vac @ |sin q| @ 2

Vout

On Time Capacitor

Ct w

2 @ Pout @ LMAX @ Icharge

h @ VacLL 2 @ VCt(MAX)

Where VacLL is the minimum line in-

put voltage and LMAX is the maxim-

um inductor value. Icharge and

VCt(MAX) are shown in the specifica-

tion table.

Inductor Turns to ZCD

Turns Ratio

NB :NZCD v

Vout * 2 @ VacHL

VZCD(ARM)

Where VacHL is the maximum line

input voltage. VZCD(ARM) is shown in

the specification table.

Resistor from ZCD

Winding to the ZCD pin

RZCD w

2 @ VacHL

IZCD(MAX) @ (NB :NZCD)

Where IZCD(MAX) is maximum rated

current for the ZCD pin (10 mA).

Output Voltage and Output

Divider

Vout + VREF @ Rout1 @

Rout2 ) RFB

Rout2 @ RFB

) 1

Rout1 +

Vout

Ibias(out)

Rout2 +

Rout1 @ RFB

RFB @

Vout

VREF

* 1 * Rout1

Where VREF is the internal reference

voltage and RFB is the pull−down

resistor used for FPP. VREF and RFB

are shown in the specification table.

Ibias(out) is the bias current of the out-

put voltage divider.

Output Voltage OVP

Detection and Recovery

Vout(OVP) +

VOVP

VREF

@ VREF @ Rout1 @

Rout2 ) RFB

Rout2 @ RFB

) 1

Vout(OVPL) +

VOVP

VREF

@ VREF −VOVP(HYS) @ Rout1 @

Rout2 ) RFB

Rout2 @ RFB

) 1

VOVP/VREF and VOVP(HYS) are

shown in the specification table.

Output Voltage Ripple and

Output Capacitor Value

Cbulk w

Pout

2 @ p @ Vripple(peak−peak) @ fline @ Vout

Vripple(peak−peak) t 2 @ Vout(OVP) * Vout

Where fline is the ac line frequency

and Vripple(peak−peak) is the peak−to−

peak output voltage ripple. Use fline =

47 Hz for universal input worst case.

Output Capacitor rms

Current

IC(RMS) +

2 @ 32 @ Pout 2

9 @ p @ Vac @ Vout @ h2

* Iload(RMS)

2

Where Iload(RMS) is the rms load cur-

rent.

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