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S29AL008J Datasheet(PDF) 42 Page - SPANSION |
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S29AL008J Datasheet(HTML) 42 Page - SPANSION |
42 / 54 page 42 S29AL008J S29AL008J_00_11 April 12, 2012 Da ta Sh e e t 17.2 Hardware Reset (RESET#) Note Not 100% tested. Figure 17.2 RESET# Timings Note 1. CE# should only go low after RESET# has gone high. Keeping CE# low from power up through the first read could cause the first read to retrieve erroneous data. Parameter Description All Speed Options JEDEC Std Test Setup Unit tREADY RESET# Pin Low (During Embedded Algorithms) to Read or Write (See Note) Max 35 µs tREADY RESET# Pin Low (NOT During Embedded Algorithms) to Read or Write (See Note) Max 500 ns tRP RESET# Pulse Width Min 500 tRH RESET# High Time Before Read (See Note) 50 tRPD RESET# Low to Standby Mode 35 µs tRB RY/BY# Recovery Time 0 ns RESET# RY/BY# RY/BY# tRP tReady Reset Timings NOT during Embedded Algorithms (Note 1) tReady CE#, OE# tRH CE#, OE# Reset Timings during Embedded Algorithms RESET# tRP tRB |
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