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AD28MSP01 Datasheet(PDF) 13 Page - Analog Devices

Part # AD28MSP01
Description  PSTN Signal Port
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD28MSP01 Datasheet(HTML) 13 Page - Analog Devices

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AD28msp01
REV. A
–13–
V.32 Loopback Mode
In V.32 Loopback Mode, shown in Figure 9, the AD28msp01’s
receive circuitry and transmit circuitry are locked together.
RCONV is generated internally and can be phase adjusted with
the Receive Phase Adjust Register (Control Register 4). RBIT,
RBAUD, TCONV, TBIT and TBAUD are all locked to
RCONV.
RCONV initiates a new DAC sample update and loads Data
Register 2 with a new sample. The RCONV rate can be set to
9.6 kHz, 8.0 kHz or 7.2 kHz by setting the sample rate bit field
in Control Register 0. The bit and baud rates can be set to
any combination of clock rates listed in the control register
descriptions.
Figure 9. Loopback Mode Block Diagram
AD28msp01
A/D
DATA
REGISTER 2
CONTROL
REGISTER 4
RX PHASE ADJUST
ANALOG IN
MCLK
16
16
DSP Processor
D/A
DATA
REGISTER 0
16
ANALOG OUT
TCONV
TBIT
TBAUD
PHASE ADJUST
TX CLOCKS
TX CLOCKS
RCONV
RBIT
RBAUD
PHASE ADJUST
CONVERT
START
RX CLOCKS
V.32ter TSYNC Mode
This mode is identical to V.32 TSYNC Mode except all clocks
are scaled by a factor of 8/7 over the corresponding V.32
TSYNC rate. In this mode, the maximum value to which the re-
ceive and transmit phase adjust registers (Control Registers 4
and 5) may be set is +192.
Both TBIT and RBIT can be set to a 19,200 Hz rate that will
not be scaled by a factor of 8/7, by setting the appropriate fields
in Control Registers 2 and 3.
V.32ter Internal Sync Mode
This mode is identical to V.32 TSYNC Mode except all clocks
are scaled by a factor of 8/7 over the corresponding V.32
TSYNC rate. In this mode, the maximum value to which the
phase adjust registers (Control Registers 4 and 5) may be set is
+192.
Both TBIT and RBIT can be set to a 19,200 Hz rate that will
not be scaled by a factor of 8/7, by setting the appropriate fields
in Control Registers 2 and 3.


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