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RT8206M Datasheet(PDF) 22 Page - Richtek Technology Corporation |
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RT8206M Datasheet(HTML) 22 Page - Richtek Technology Corporation |
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22 / 27 page  RT8206L/M 22 DS8206L/M-07 June 2012 www.richtek.com © Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. capacitor between BOOTx and PHASEx pins. A dead time to prevent shoot through is internally generated between high side MOSFET off to low side MOSFET on, and low side MOSFET off to high side MOSFET on. The low side driver is designed to drive high current low RDS(ON) N-MOSFET(s). The internal pulldown transistor that drives LGATEx low is robust, with a 0.6 Ω typical on- resistance. A 5V bias voltage is typically delivered from PVCC through LDO supply. The instantaneous drive current is supplied by an input capacitor connected between PVCC and GND. For high current applications, some combinations of high and low side MOSFETs might be encountered that will cause excessive gate-drain coupling, which can lead to efficiency-killing, EMI-producing shoot-through currents. This is often remedied by adding a resistor in series with BOOTx, which increases the turn-on time of the high side MOSFET without degrading the turn-off time (Figure 5). Figure 5. Reducing the UGATEx Rise Time Soft-Start The RT8206L/M provides an internal soft-start function to prevent large inrush current and output voltage overshoot when the converter starts up. The soft-start (SS) automatically begins once the chip is enabled. During soft-start period, the internal current limit circuit gradually ramps up the inductor current from zero. The maximum current limit value is set externally as described in previous section. The soft-star time is determined by the current limit and output capacitor value. The current limit threshold ramp up time is typically 2ms from zero to 200mV after ENx is enabled. A unique PWM duty limit control that prevents output over voltage during soft-start period is designed specifically for FBx floating. POR and UVLO Power On Reset (POR) occurs when VIN rises above approximately 5V (typ.), resetting the fault latches. PVCC Under Voltage Lockout (UVLO) circuitry inhibits switching by keeping UGATEx and LGATEx low when PVCC is below 4.05V. The PWM outputs begin to ramp up once PVCC exceeds its UVLO threshold and ENx is enabled. Power Good Output (PGOODx) The PGOODx is an open-drain type output. PGOODx is actively held low in soft-start, standby, and shutdown. It is released when the VOUTx voltage is above 90% of the nominal regulation point. The PGOODx goes low if it is 10% below its nominal regulator point. Output Over Voltage Protection (OVP) The output voltage can be continuously monitored for over voltage protection. When the output voltage of the VOUTx is 12% above the set voltage, over voltage protection will be enabled. If the output exceeds the over voltage threshold, over voltage fault protection will be triggered and the LGATEx low side gate drivers are forced high. This activates the low side MOSFET switch, which rapidly discharges the output capacitor and reduces the output voltage. Once an over voltage fault condition is set, it can only be reset by toggling ENLDO, ENx, or cycling VIN (POR.) Output Under Voltage Protection (UVP) The output voltage can be continuously monitored for under voltage protection. If the output is less than 55% of the error-amplifier trip voltage, under voltage protection will be triggered, and then both UGATEx and LGATEx gate drivers will be forced low. The UVP will be ignored for at least 5ms (typ.) after start-up or after a rising edge on ENx. Toggle ENx or cycle VIN (POR) to clear the under voltage fault latch and restart the controller. The UVP only applies to the PWM outputs. Thermal Protection The RT8206L/M has a thermal shutdown protection function to prevent it from overheating. Thermal shutdown occurs when the die temperature exceeds +150 °C. All BOOTx UGATEx PHASEx VIN |
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