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RT8206M Datasheet(PDF) 7 Page - Richtek Technology Corporation |
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RT8206M Datasheet(HTML) 7 Page - Richtek Technology Corporation |
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7 / 27 page  RT8206L/M 7 DS8206L/M-07 June 2012 www.richtek.com © Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. PHASE1 (Pin 16) Inductor Connection for SMPS1. PHASE1 is the internal lower supply rail for the UGATE1 high side gate driver. PHASE1 is the current-sense input for the SMPS1. BOOT1 (Pin 17) Boost Flying Capacitor Connection for SMPS1. Connect to an external capacitor according to the typical application circuits. LGATE1 (Pin 18) SMPS1 Synchronous-RectifierGate-drive Output. LGATE1 swings between PGND and PVCC. PVCC (Pin 19) Supply Voltage for Low Side MOSFET driver LGATEx. Connect a 5V power source to the PVCC pin (bypass with 1 μF MLCC capacitor to PGND if necessary). There is an internal 10 Ω connecting from PVCC to VCC. Make sure that both VCC and PVCC are bypassed with 1 μF MLCC capacitors. SECFB (Pin 20) (RT8206L) Charge Pump Feedback Input. The SECFB is used to monitor the optional external charge pump. Connect a resistive voltage-divider from the charge pump output to GND to detect the output. If SECFB drops below the threshold voltage, an ultrasonic pulse occurs to refresh the external charge pump driven by LGATE1 or LGATE2 NC (Pin 20) (RT8206M) No Internal Connection. GND [Pin 21, 33 (Exposed Pad)] Analog Ground for both SMPS and LDO. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. PGND (Pin 22) Power Ground for SMPS Controller. Connect PGND externally to the underside of the exposed pad. LGATE2 (Pin 23) SMPS2 Synchronous-RectifierGate-drive Output. LGATE2 swings between PGND and PVCC. BOOT2 (Pin 24) Boost Flying Capacitor Connection for SMPS2. Connect this pin to an external capacitor according to the typical application circuits. PHASE2 (Pin 25) Inductor Connection for SMPS2. PHASE2 is the internal lower supply rail for the UGATE2 high side gate driver. PHASE2 is the current sense input for the SMPS2. UGATE2 (Pin 26) High Side MOSFET Floating Gate-Driver Output for SMPS2. UGATE2 swings between PHASE2 and BOOT2. EN2 (Pin 27) SMPS2 Enable Input. The SMPS2 will be enabled if EN2 is greater than the logic high level and be disabled if EN2 is less than the logic low level. If EN2 is connected to REF, the SMPS2 starts after the SMPS1 reaches regulation (delay start). Drive EN2 below 0.8V to clear fault level and reset the fault latches. PGOOD2 (Pin 28) SMPS2 Power Good Open-Drain Output. PGOOD2 is low when the SMPS2 output voltage is more than 10% below the normal regulation point or during soft-start. PGOOD2 is high impedance when the output is in regulation and the soft-start circuit has terminated. PGOOD2 is low in shutdown. SKIP (Pin 29) SMPS Operation Mode Control. SKIP = GND : DEM Mode operation SKIP = REF : Ultrasonic Mode operation SKIP = VCC : PWM Mode operation. |
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