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CXP818P48A Datasheet(PDF) 7 Page - Sony Corporation |
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CXP818P48A Datasheet(HTML) 7 Page - Sony Corporation |
7 / 26 page – 7 – CXP818P48A Data bus RD (Port D) Port D direction Port D data High current 12mA IP (Every 4 bits) PD0 to 3 PD4 to 7 PPO, RTO data Data bus RD (Port C) Port C direction Port C data Input protection circuit IP (Every bit) Port C 16 pins Hi-Z Hi-Z When reset PA0/PPO0 to PA7/PPO7 PB0/PPO8 to PB7/PPO15 PC0/PPO16 to PC2/PPO18 PC3/RTO3 to PC7/RTO7 Port D 8 pins 8 pins Hi-Z PD0 to PD7 PPO data Data bus Output becomes active from high impedance by data writing to port register. Port A or Port B RD Input/Output Circuit Formats for Pins Port A Port B Pin Circuit format |
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